JPS5871218U - push pull amplifier circuit - Google Patents

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、従来のプッシュプル増幅回路を示す回路図、
第２図は本考案の一実施例を示す回路図、及び第３図は
本考案の別の実施例を示す回路図である。 主な図番の説明、１１・・・差動増幅回路、１４゜１５
．１６・・・駆動トランジスタ、１７．　１８゜１９・
・・電流ミラー回路、２１・・・バイアス設定回路。FIG. 1 is a circuit diagram showing a conventional push-pull amplifier circuit,
FIG. 2 is a circuit diagram showing one embodiment of the present invention, and FIG. 3 is a circuit diagram showing another embodiment of the present invention. Explanation of main drawing numbers, 11...Differential amplifier circuit, 14゜15
．． 16... drive transistor, 17. 18°19・
...Current mirror circuit, 21...Bias setting circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号中の正及び負信号を独立に増幅する第１及び第
２駆動段と、該第１駆動段の出力信号を増幅する電流ミ
ラー回路のみで構成された上側電流増幅段と、前記第２
駆動段の出力信号を増幅する電流ミラー回路のみで構成
された下側電流増幅段と、前記第１もしくは第２駆動段
のバイアス設定を行う為のバイアス段とから成り、前記
上側及び下側電流増幅段の出力信号をプッシュプル関係
で出力中点に印加するとともに、該バイアス段と前記第
１もしくは第２駆動段とを略同−の回路構成と成したこ
とを特徴とするプッシュプル増幅回路。a first and second drive stage that independently amplifies positive and negative signals in the input signal; an upper current amplification stage that includes only a current mirror circuit that amplifies the output signal of the first drive stage;
It consists of a lower current amplification stage consisting only of a current mirror circuit that amplifies the output signal of the drive stage, and a bias stage for setting the bias of the first or second drive stage, and the upper and lower current A push-pull amplifier circuit, characterized in that the output signal of the amplifier stage is applied to the output midpoint in a push-pull relationship, and the bias stage and the first or second drive stage have substantially the same circuit configuration. .