JPS5914410U - automatic gain control circuit - Google Patents

automatic gain control circuit

Info

Publication number
JPS5914410U
JPS5914410U JP11061582U JP11061582U JPS5914410U JP S5914410 U JPS5914410 U JP S5914410U JP 11061582 U JP11061582 U JP 11061582U JP 11061582 U JP11061582 U JP 11061582U JP S5914410 U JPS5914410 U JP S5914410U
Authority
JP
Japan
Prior art keywords
automatic gain
gain control
control circuit
amplifier
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11061582U
Other languages
Japanese (ja)
Inventor
仁後 悦也
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP11061582U priority Critical patent/JPS5914410U/en
Publication of JPS5914410U publication Critical patent/JPS5914410U/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の自動利得制御回路を示す回路図、第2図
はこの考案の一実施例による自動利得ル制御回路を示す
回路図、第3図は従来の自動利得制御回路と、この考案
の一実施例による自動利得制御回路の入出力特性を示す
特性図である。 1・・・可変利得回路、2・・・高周波増幅器、3・・
・結合回路、4・・・検波回路、6・・・差動増幅器、
8・・・ループ利得可変回路。
FIG. 1 is a circuit diagram showing a conventional automatic gain control circuit, FIG. 2 is a circuit diagram showing an automatic gain control circuit according to an embodiment of this invention, and FIG. 3 is a circuit diagram showing a conventional automatic gain control circuit and this invention. FIG. 2 is a characteristic diagram showing input/output characteristics of an automatic gain control circuit according to an embodiment. 1... Variable gain circuit, 2... High frequency amplifier, 3...
・Coupling circuit, 4...detection circuit, 6...differential amplifier,
8...Loop gain variable circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 負帰還制御ループにより増幅器の出力レベルを一定に維
持する自動利得制御回路において、上記負帰還制御ルー
プに帰還増幅器を設けると共に、この帰還増幅器の出力
電位に応じてループ利得を制御するループ利得可変回路
を設け、自動利得制御域端部における上記増幅器の出力
レベルが一定となるようにしたことるを特徴とする自動
利得制御回路。−
In an automatic gain control circuit that maintains the output level of an amplifier constant using a negative feedback control loop, a variable loop gain circuit that includes a feedback amplifier in the negative feedback control loop and controls the loop gain according to the output potential of the feedback amplifier. An automatic gain control circuit characterized in that the output level of the amplifier is constant at the end of the automatic gain control range. −
JP11061582U 1982-07-19 1982-07-19 automatic gain control circuit Pending JPS5914410U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11061582U JPS5914410U (en) 1982-07-19 1982-07-19 automatic gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11061582U JPS5914410U (en) 1982-07-19 1982-07-19 automatic gain control circuit

Publications (1)

Publication Number Publication Date
JPS5914410U true JPS5914410U (en) 1984-01-28

Family

ID=30257172

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11061582U Pending JPS5914410U (en) 1982-07-19 1982-07-19 automatic gain control circuit

Country Status (1)

Country Link
JP (1) JPS5914410U (en)

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