JPS5856995U - electronic clock - Google Patents

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の実施例に係る電子時計のブロック図、
第２図は第１図の電子時計の龍頭の断面図、第３図は第
１図の詳細なブロック図、第４図は本考案あ電子時計の
他の実施例ブロック図、竿５図は第４図の詳細なブロッ
ク図である。 ３・・・・・・モータ駆動回路、５・・・・・・スイッ
チ装置、６・・・・・・緩急呼出し回路、７・・・・・
・緩急処理回路、７１・・・・・・緩急値メモリ。FIG. 1 is a block diagram of an electronic timepiece according to an embodiment of the present invention;
Fig. 2 is a sectional view of the crown of the electronic watch shown in Fig. 1, Fig. 3 is a detailed block diagram of Fig. 1, Fig. 4 is a block diagram of another embodiment of the electronic watch of the present invention, and Fig. FIG. 5 is a detailed block diagram of FIG. 4; 3...Motor drive circuit, 5...Switch device, 6...Sleep call circuit, 7...
- Slow/slow processing circuit, 71... Slow/slow value memory.

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] （１）基準発振回路、分周回路、モータ駆動回路、パル
スモータ及び複数の設定位置を有する外部操作部材を備
え、前記外部操作部材の特定の設定位置に於て、前記モ
ータ駆動回路を非動作状態とする節電モードを有する電
子時計において、前記外部操作部材の操作に従って歩度
修正をするためめ緩急処理回路と緩急呼出し回路とを設
け、該緩急呼出し回路は、前記外部操作部材の節電モー
ド位置に於ける操作により緩急モード信号を発生し、該
緩急モード信号は前記緩急処理回路を緩急値設定状態と
することを特徴とする電子時計。(1) A reference oscillation circuit, a frequency dividing circuit, a motor drive circuit, a pulse motor, and an external operating member having a plurality of set positions, the motor drive circuit being inoperable at a specific set position of the external operating member. In an electronic timepiece having a power saving mode in which the external operating member is in a power saving mode, an electronic timepiece is provided with a speed adjustment processing circuit and a speed control calling circuit for correcting the rate according to the operation of the external operating member, and the speed calling circuit is set in the power saving mode position of the external operating member. 1. An electronic timepiece, characterized in that a slow/fast mode signal is generated by an operation in the electronic watch, and the slow/fast mode signal sets the slow/fast processing circuit to a slow/fast value setting state. （２）実用新案登録請求の範囲第１項記載の緩急モード
信号はモー　タ駆動回路の節電モードを解除する信号で
あることを特徴とする電子時計。(2) Utility Model Registration An electronic timepiece characterized in that the speed/speed mode signal recited in claim 1 is a signal for canceling the power saving mode of the motor drive circuit.