JPS5840939U - Isolated buffer circuit - Google Patents

Isolated buffer circuit

Info

Publication number
JPS5840939U
JPS5840939U JP1981133013U JP13301381U JPS5840939U JP S5840939 U JPS5840939 U JP S5840939U JP 1981133013 U JP1981133013 U JP 1981133013U JP 13301381 U JP13301381 U JP 13301381U JP S5840939 U JPS5840939 U JP S5840939U
Authority
JP
Japan
Prior art keywords
buffer circuit
output
signal
delay
waveform shaping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1981133013U
Other languages
Japanese (ja)
Inventor
林　昭佳
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP1981133013U priority Critical patent/JPS5840939U/en
Publication of JPS5840939U publication Critical patent/JPS5840939U/en
Pending legal-status Critical Current

Links

Classifications

    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00—Road transport of goods or passengers
    • Y02T10/60—Other road transportation technologies with climate change mitigation effect
    • Y02T10/72—Electric energy management in electromobility

Landscapes

  • Pulse Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の実施例の回路図、第２図はＡＴＣ信号
切換動作図、第３図は本考案の動作を説明するタイミン
グチャートである。FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is an ATC signal switching operation diagram, and FIG. 3 is a timing chart explaining the operation of the present invention.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 信号の絶縁素子、信号を増巾する素子、遅延特性をもた
せる回路および波形整形素子により構成される回路にお
いて、前記絶縁素子としてフォトカプラを使用し、この
出力をｉＣポジティブアンドドライバにより増巾し、さ
らに、前記ｉＣの出力抵抗とコンデンサにより、出力電
圧の立上りに積分特性をもたせ、この電圧の変化をｉＣ
シュミットトリガによって検出することで遅延特性と波
形整形特性を同時にもたせ、入力信号の立上りに対して
は即応答し、立下りに対しては遅延特性をもつことを特
徴とする絶縁形バッファ回路。In a circuit composed of a signal insulating element, a signal amplifying element, a delay characteristic circuit, and a waveform shaping element, a photocoupler is used as the insulating element, and the output is amplified by an iC positive and driver, Furthermore, the output resistance and capacitor of the iC give an integral characteristic to the rise of the output voltage, and the change in this voltage is reflected by the iC.
An isolated buffer circuit characterized by having delay characteristics and waveform shaping characteristics at the same time by detecting with a Schmitt trigger, responding immediately to the rising edge of an input signal, and having delay characteristics to the falling edge of the input signal.
JP1981133013U 1981-09-09 1981-09-09 Isolated buffer circuit Pending JPS5840939U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1981133013U JPS5840939U (en) 1981-09-09 1981-09-09 Isolated buffer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1981133013U JPS5840939U (en) 1981-09-09 1981-09-09 Isolated buffer circuit

Publications (1)

Publication Number Publication Date
JPS5840939U true JPS5840939U (en) 1983-03-17

Family

ID=29926501

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1981133013U Pending JPS5840939U (en) 1981-09-09 1981-09-09 Isolated buffer circuit

Country Status (1)

Country Link
JP (1) JPS5840939U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6035906A (en) * 1983-08-08 1985-02-23 Kawasaki Steel Corp Automatic conveying system using guiding radio transmitter/receiver
JPH0286332U (en) * 1988-12-21 1990-07-09

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6035906A (en) * 1983-08-08 1985-02-23 Kawasaki Steel Corp Automatic conveying system using guiding radio transmitter/receiver
JPH0286332U (en) * 1988-12-21 1990-07-09

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