JPS5832652U - 半導体装置の製造装置 - Google Patents

半導体装置の製造装置

Info

Publication number
JPS5832652U
JPS5832652U JP12775381U JP12775381U JPS5832652U JP S5832652 U JPS5832652 U JP S5832652U JP 12775381 U JP12775381 U JP 12775381U JP 12775381 U JP12775381 U JP 12775381U JP S5832652 U JPS5832652 U JP S5832652U
Authority
JP
Japan
Prior art keywords
solder member
device manufacturing
semiconductor device
base
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12775381U
Other languages
English (en)
Inventor
中川　正美
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP12775381U priority Critical patent/JPS5832652U/ja
Publication of JPS5832652U publication Critical patent/JPS5832652U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H01L2224/75302—Shape
    • H01L2224/75303—Shape of the pressing surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は本案の一実施例を示す平面図、第２図は第１図
のＸ−Ｘ断面図、第３図は第１図のＹ−Ｙ断面図、第４
−図は第１図のｚ−ｚ断面図、第５図〜第７図はマウン
ト方法の説明図であって、第５図は半導体素子の基体へ
の供給前の状態を示す断面図、第６図は位置修正状態を
示す断面図、第７図は急冷状態を示す断面図である。 図中、１はレール、４は供給装置、６は位置決め装置、
７は位置修正爪、９は基体、１０は半田部材、１１は半
導体素子である。

Claims (1)

    【実用新案登録請求の範囲】
  1. 上面に基体と共に半田部材を載置すると共に、基体を介
    して半田部材を溶融状態にまで加熱するレールと、基体
    における溶融状態の半田部材上に半導体素子を真空吸着
    によって供給する供給装置と、複数の位置修正爪を有し
    、かつレール上に上下動自在に配設した位置決め装置と
    を具備し、上記溶融状態にある半田部材上の半導体素子
    を位置決め装置の位置修正爪にて挾持することにより、
    半導体素子を所定の位置に修正することを特徴とする半
    導体装置の製造装置。
JP12775381U 1981-08-27 1981-08-27 半導体装置の製造装置 Pending JPS5832652U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12775381U JPS5832652U (ja) 1981-08-27 1981-08-27 半導体装置の製造装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12775381U JPS5832652U (ja) 1981-08-27 1981-08-27 半導体装置の製造装置

Publications (1)

Publication Number Publication Date
JPS5832652U true JPS5832652U (ja) 1983-03-03

Family

ID=29921472

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12775381U Pending JPS5832652U (ja) 1981-08-27 1981-08-27 半導体装置の製造装置

Country Status (1)

Country Link
JP (1) JPS5832652U (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61207205U (ja) * 1985-06-17 1986-12-27
JPS62185503U (ja) * 1986-05-19 1987-11-25
JPS63189005U (ja) * 1987-05-29 1988-12-05

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61207205U (ja) * 1985-06-17 1986-12-27
JPH0451602Y2 (ja) * 1985-06-17 1992-12-04
JPS62185503U (ja) * 1986-05-19 1987-11-25
JPH0130086Y2 (ja) * 1986-05-19 1989-09-13
JPS63189005U (ja) * 1987-05-29 1988-12-05

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