JPS60129141U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS60129141U
JPS60129141U JP1984014854U JP1485484U JPS60129141U JP S60129141 U JPS60129141 U JP S60129141U JP 1984014854 U JP1984014854 U JP 1984014854U JP 1485484 U JP1485484 U JP 1485484U JP S60129141 U JPS60129141 U JP S60129141U
Authority
JP
Japan
Prior art keywords
semiconductor equipment
junction
semiconductor device
semiconductor substrate
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984014854U
Other languages
English (en)
Inventor
広治 古里
木崎 清治
Original Assignee
新電元工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 新電元工業株式会社 filed Critical 新電元工業株式会社
Priority to JP1984014854U priority Critical patent/JPS60129141U/ja
Publication of JPS60129141U publication Critical patent/JPS60129141U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】

Claims (1)

    【実用新案登録請求の範囲】
  1. PN接合を有する半導体基体の両面に夫々半田′  層
    を介して電極金属が一体に崩御された半導体装置におい
    て、前記半導体基体のPN接合に近接した表面上の半田
    層に金属片を介在せしめたことを特徴と、する半導体装
    置。
JP1984014854U 1984-02-03 1984-02-03 半導体装置 Pending JPS60129141U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984014854U JPS60129141U (ja) 1984-02-03 1984-02-03 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984014854U JPS60129141U (ja) 1984-02-03 1984-02-03 半導体装置

Publications (1)

Publication Number Publication Date
JPS60129141U true JPS60129141U (ja) 1985-08-30

Family

ID=30500159

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984014854U Pending JPS60129141U (ja) 1984-02-03 1984-02-03 半導体装置

Country Status (1)

Country Link
JP (1) JPS60129141U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014116511A (ja) * 2012-12-11 2014-06-26 Hitachi Power Semiconductor Device Ltd パワー半導体装置、整流装置および電源装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4944157B1 (ja) * 1969-11-20 1974-11-26
JPS5755954B2 (ja) * 1978-03-16 1982-11-26

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4944157B1 (ja) * 1969-11-20 1974-11-26
JPS5755954B2 (ja) * 1978-03-16 1982-11-26

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014116511A (ja) * 2012-12-11 2014-06-26 Hitachi Power Semiconductor Device Ltd パワー半導体装置、整流装置および電源装置

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