JPS58182243A - Preparation of semiconductor device - Google Patents

Preparation of semiconductor device

Info

Publication number
JPS58182243A
JPS58182243A JP6580682A JP6580682A JPS58182243A JP S58182243 A JPS58182243 A JP S58182243A JP 6580682 A JP6580682 A JP 6580682A JP 6580682 A JP6580682 A JP 6580682A JP S58182243 A JPS58182243 A JP S58182243A
Authority
JP
Japan
Prior art keywords
film
polycrystalline silicon
poly
heated
laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6580682A
Other languages
Japanese (ja)
Inventor
Keiji Kobayashi
啓二 小林
Yasuo Nakai
康雄 中井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6580682A priority Critical patent/JPS58182243A/en
Publication of JPS58182243A publication Critical patent/JPS58182243A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body

Abstract

PURPOSE:To obtain an apparatus having good characteristic by roviding an element through the processes that after surface of low cost glass plate which is available in the markets is processed with SiCl4 or TiCl4 gas, it is heated and a poly-Si film is stacked thereon through Al2O3 or Si3N thin film and it is annealed and recrystallized. CONSTITUTION:The surface of cheap glass plate such as BSG etc. is processed with the SiC4 or TiC4 gas and heated in view of reducing concentration of thermal stress due to damage on the surface. Thereafter, one or more layers of Si3N4 thin films are formed by the CVD method. Next, a poly-Si film is deposited in the thickness of about 1mum by the low pressure CVD method and it is annealed by the spot of CW Ar laser. At this time, laser heat is transferred and sattered by the Al2O3 or Si3N4 thin film and thermal shock is drastically alleviated and thereby glass avilable in the markets can be used. A polycrystalline silicon film surface is heated up to about 1,240 deg.C and subjected to recrystallization in average particle size of about 5mum by the annealing. Mobility of poly-Si reaches 100cm<2>/V seconds or more and when an element is formed thereon, characteristic can be improved remarkably.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明はガラス基板上に堆積した多結晶シリコン膜を
用いて菓子を形成する半導体＆ｔｔの製造方法に関する
。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor &tt in which a confectionery is formed using a polycrystalline silicon film deposited on a glass substrate.

〔元明の技術的背景とその問題点〕[Technical background of Genmei and its problems]

低米この樵の半導体装置のＭ造５：は、ガラス基板材料
としてホウケイ酸ガラスを用いるのが一般的であった。In the case of M-type 5: low-cost semiconductor devices, borosilicate glass was generally used as the glass substrate material.

しかしこのガラスは耐熱性が尚４６００℃位しかなく、
この上に形成した多結晶シリコンを十分な高温でアニー
ルすることかでとず、再結晶化処理による粒径の増大シ
ニ限度がある。このためガラス基板上の多結晶シリコン
を用いてつくったＦＥＴの磁界効果４！１＃ｈ度ハ高々
１〜２ｃＩＬｔ／ｖ−ＩＩＣ程度であった。６莢ガラス
は耐熱性シニ優れているため、アニール処地には好まし
いが、コストが高く加工が困難であるＯ 〔発明の目的〕 本発明は１通常のガラス基板を用いて、これを破損する
ことなくこの上に堆積された多結晶・シリコン膜を十分
なアニールによる再結晶化処理をして良好な特性の素子
を得ることを可能とした半導体装置の製造方法を提供す
るものである。However, the heat resistance of this glass is still only around 4600℃,
There is a limit to the increase in grain size due to recrystallization treatment, even if the polycrystalline silicon formed thereon is annealed at a sufficiently high temperature. For this reason, the magnetic field effect of an FET fabricated using polycrystalline silicon on a glass substrate was approximately 1 to 2 cILt/v-IIC at most. 6-Shelled glass has excellent heat resistance, so it is preferable for annealing, but it is expensive and difficult to process. The present invention provides a method for manufacturing a semiconductor device which makes it possible to obtain an element with good characteristics by recrystallizing the polycrystalline silicon film deposited thereon by sufficient annealing without causing any damage.

〔発明の概要〕[Summary of the invention]

本発明は、基板として普通のホウケイ酸ガラス、ソーダ
石灰ガラス、アルミノシリケートガラス等市販の安価な
ガラス板を用い、この上に８ｉＣｊ４またはＴＩＣｊ４
ＩＣ−よる表面錫塩後、′　　加熱し１次いでＣＶＤ、
スパッター法等でＡｌ＊Ｏ，またはＳ　ｉ　Ｎ４薄膜を
一層以上形成する。In the present invention, a commercially available inexpensive glass plate such as ordinary borosilicate glass, soda lime glass, or aluminosilicate glass is used as a substrate, and 8iCj4 or TICj4
After surface tin salting by IC-heating and then CVD,
One or more layers of Al*O or SiN4 thin film are formed by sputtering or the like.

このような基板処理を行った後、多結晶シリコン膜を例
えば低圧ＣＶＤ法で堆積させ、この多結晶シリコン膜を
熱、レーザー、電子線等でアニールして再結晶化させ、
この多結晶シシコン膜に素子を形成する。After performing such substrate processing, a polycrystalline silicon film is deposited by, for example, a low-pressure CVD method, and this polycrystalline silicon film is annealed with heat, laser, electron beam, etc. to recrystallize it.
Elements are formed on this polycrystalline silicon film.

〔発明の効果〕〔Effect of the invention〕

多結晶シリコン堆積前に前記のような基板処理をすると
、多結晶シリコンのアニール処理の際のガラス基板の温
度上昇を効果的に抑えることができる。例えば第１図は
ガラス基板に直接多結晶シリコン膜を１μ島の厚さに堆
積させて、１２ＷのＣＷ、Ａｒレーザーでスポット径８
０μ鼻でアニールしたときの温度分布を示しており、こ
のときガラス基板表面では約９５０’Ｃとなる。このよ
うな高温に耐えうるガラスは石英ガラスを除いて他にな
い。これに対し本発明の表面処理を施したガラス基板を
用いた場合ＡＡｉＲＯ□または８１ｓＮ４１ｉ＃でレー
ザーの熱の移動、散乱等が行われる。従って第１図とア
ニール条件を同じとしてガラス基板表面の温度は、ｋｌ
＊Ｏ，またはＳｌ、Ｎ、薄膜を１μ講としたとき、第２
図に示すように７００℃となり、黙備撃が大幅に緩和さ
れる。また本発明によればガラス基板上のＳ　Ｉ　ＣＪ
、又はＴｌＣ１，ノＬ＊　Ｊ二より、ガラスの傷などに
よる応力集中を減少させることができ、ガラスの破損が
防止される。If the substrate is treated as described above before depositing polycrystalline silicon, the temperature rise of the glass substrate during annealing of polycrystalline silicon can be effectively suppressed. For example, in Figure 1, a polycrystalline silicon film is deposited directly on a glass substrate to a thickness of 1 μm, and a spot diameter of 8
It shows the temperature distribution when annealing is performed at 0μ, and at this time, the temperature on the glass substrate surface is approximately 950'C. There is no other glass other than quartz glass that can withstand such high temperatures. On the other hand, when a glass substrate subjected to the surface treatment of the present invention is used, the heat of the laser is transferred, scattered, etc. by AAiRO□ or 81sN41i#. Therefore, assuming the same annealing conditions as in Figure 1, the temperature of the glass substrate surface is kl
*O, or Sl, N, when the thin film is 1μ, the second
As shown in the figure, the temperature reaches 700 degrees Celsius, and the silent attack is greatly alleviated. Further, according to the present invention, S I CJ on a glass substrate
, or TlC1, NoL*J2, stress concentration due to scratches on the glass can be reduced, and breakage of the glass can be prevented.

父第３図に示すように、ＣＷ−Ａｒレーザー出力を１２
Ｗとしたとき多結晶シリコン膜の表面温度は１２５０℃
位になるが、この程度のレーザーアニールを行うと平均
粒径は約５μ肩となる。そして第４図に示すように、５
μ具の粒径では多結晶シリコン膜の移動度がμｈ−１０
０ＣＩＫ”／　Ｖ−ｓ＠ａ以上となり、これに薄膜トラ
ンジスタ等の菓子を形成したときその素子特性は着るし
く改善される。As shown in Figure 3, the CW-Ar laser output was set to 12
When W is used, the surface temperature of the polycrystalline silicon film is 1250°C.
However, if this level of laser annealing is performed, the average grain size will be approximately 5 μm. And as shown in Figure 4, 5
The mobility of the polycrystalline silicon film is μh-10 due to the grain size of the μ tool.
0CIK''/V-s@a or more, and when a confectionery such as a thin film transistor is formed thereon, the device characteristics are pleasantly improved.

〔発明の実施例〕[Embodiments of the invention]

実施例１゜ ５ｉ０１８０ｖｔ％、ムｌ鵞０＠２ｗｔ％ｓＮａ１０４
ｗｔ％。Example 1゜5i0180vt%, Mulan 0@2wt%sNa104
wt%.

Ｊ　Ｏ＠　１４ｗｔ％のガラス基板（α−３４Ｘ１０−
’。JO@14wt% glass substrate (α-34X10-
'.

Ｔｓ−８３０℃、Ｔｌ−５３０℃）を用いた。このガラ
ス基板上１：５１ｃｌＪｌをｏ、５ｐｘｓ、３５０’Ｃ
でつけ、Ａ／、０．［をスパッター法で１μ嵐っけ、こ
のｔにＬｐ−ＣＶＤ法によって多結晶シリコン膜を１μ
ｍつけた。ＣＷ−Ａｒレーザー１０Ｗ。Ts-830°C, Tl-530°C) were used. 1:51clJl on this glass substrate, 5pxs, 350'C
Detsuke, A/, 0. A 1 μm film of polycrystalline silicon was deposited on this layer using the Lp-CVD method.
I added m. CW-Ar laser 10W.

スポット径８０μ属でレーザーアニールを行ったがガラ
ス基板の破損はなかった。この多結晶シリコン膜の平均
粒径は３μ屏、μ＠　−４５ｃＩＬ”／Ｖ・ＩＣであっ
た。Laser annealing was performed with a spot diameter of 80 μm, but the glass substrate was not damaged. The average grain size of this polycrystalline silicon film was 3 μm, μ@−45cIL”/V·IC.

実施例２゜ ５１０１７５ｖｔ％１．Ａ１１０１５ｖｔ％、ＴＩｏ、
４ｗｔ％、Ｊ、ｏ、１２ｗｔ％、ＺｒＯ＠４ｖｔ％のガ
ラス基板（ａ−３１Ｘ１０−’、Ｔｓ−８５０℃、Ｔｌ
−５６０℃）を用い、このガラス基板上にＴＩＣｊ。Example 2゜510175vt%1. A11015vt%, TIo,
4wt%, J, o, 12wt%, ZrO@4vt% glass substrate (a-31X10-', Ts-850℃, Tl
-560°C), and TICj was deposited on this glass substrate.

を０．５／””、２５０℃でっけ更シ：Ｓｉ、Ｎ、［を
ＣＶＤ法で０．５ｐｒａツけこの上１−　Ｌ　ｐ　−Ｃ
Ｖ　ｌ）法で多結晶シリコン膜を１μ島つけた。1-L p -C
A 1μ island of polycrystalline silicon film was attached using the Vl) method.

この三層構造の上からｃｗ・ムｒレーザー１３Ｗ１スポ
ット１１００μでレーザーアニールしたが基板の破損は
なかった。この多結晶シリコンの平均粒径は５μ琳、μ
ｈ−７ｓｃａ”／ｖ・−・Ｃであった。Laser annealing was performed on this three-layer structure using a CW/MR laser 13W with a spot of 1100μ, but the substrate was not damaged. The average grain size of this polycrystalline silicon is 5μ, μ
h-7sca"/v.-.C.

【図面の簡単な説明】[Brief explanation of the drawing]

１８１図はガラス基板にｍ接多結晶シリコン腺なつけて
レーザアニールしたときの温度分布を示す図、第２図は
本発明の基板処理を施して多結晶シリコン膜をつけてレ
ーザアニールしたときの温度分布を示す図、第３図はレ
ーザ出力と表面温度の関係を示す図、第４図は多結晶シ
リコン膜の粒径と移動度との関係を示す図である。 出−人代理人　　弁理士　鈴　圧式　彦第７図 第２８１ 第３１１ ＠ｌＩ′Ｒ ＃　　を莞　　（ΔｇＷＬ）Figure 181 shows the temperature distribution when a polycrystalline silicon layer is attached to a glass substrate and laser annealed, and Figure 2 shows the temperature distribution when a polycrystalline silicon film is attached and laser annealed after the substrate treatment of the present invention is applied. FIG. 3 is a diagram showing the temperature distribution; FIG. 3 is a diagram showing the relationship between laser output and surface temperature; FIG. 4 is a diagram showing the relationship between grain size and mobility of a polycrystalline silicon film. Representative Patent Attorney Suzu Ushiki Hiko Figure 7 Figure 281 No. 311 @lI'R # (ΔgWL)

Claims (1)

【特許請求の範囲】[Claims] ガラス基板な５ｉｃＪ４またはＴｉＣＪ、ガスにより表
面処通して熱処理し、次いでＡｌ＊Ｏ，または８１、Ｎ
、＃膜、を形成し、この上に多結晶シリコン膜を堆積し
てアニールによる再結晶化処理を行い、この多結晶シリ
コン膜に素子を形成することを特徴とする半導体装置の
製造方法。Glass substrate 5icJ4 or TiCJ, surface treated with gas and heat treated, then Al*O, or 81,N
, # film, depositing a polycrystalline silicon film thereon, performing recrystallization treatment by annealing, and forming an element on this polycrystalline silicon film.
JP6580682A 1982-04-20 1982-04-20 Preparation of semiconductor device Pending JPS58182243A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6580682A JPS58182243A (en) 1982-04-20 1982-04-20 Preparation of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6580682A JPS58182243A (en) 1982-04-20 1982-04-20 Preparation of semiconductor device

Publications (1)

Publication Number Publication Date
JPS58182243A true JPS58182243A (en) 1983-10-25

Family

ID=13297633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6580682A Pending JPS58182243A (en) 1982-04-20 1982-04-20 Preparation of semiconductor device

Country Status (1)

Country Link
JP (1) JPS58182243A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5254208A (en) * 1990-07-24 1993-10-19 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
US6008078A (en) * 1990-07-24 1999-12-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
US6429483B1 (en) 1994-06-09 2002-08-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4722115U (en) * 1971-04-05 1972-11-13

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4722115U (en) * 1971-04-05 1972-11-13

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5254208A (en) * 1990-07-24 1993-10-19 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
US5716857A (en) * 1990-07-24 1998-02-10 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
US6008078A (en) * 1990-07-24 1999-12-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
US6486495B2 (en) 1990-07-24 2002-11-26 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
US7026200B2 (en) 1990-07-24 2006-04-11 Semiconductor Energy Laboratory Co. Ltd. Method for manufacturing a semiconductor device
US6429483B1 (en) 1994-06-09 2002-08-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US7547915B2 (en) 1994-06-09 2009-06-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having SiOxNy film
US8330165B2 (en) 1994-06-09 2012-12-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same

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