JPS5989436A - Manufacture of thin film semiconductor device - Google Patents

Manufacture of thin film semiconductor device

Info

Publication number
JPS5989436A
JPS5989436A JP20016782A JP20016782A JPS5989436A JP S5989436 A JPS5989436 A JP S5989436A JP 20016782 A JP20016782 A JP 20016782A JP 20016782 A JP20016782 A JP 20016782A JP S5989436 A JPS5989436 A JP S5989436A
Authority
JP
Japan
Prior art keywords
film
glass substrate
thin film
gate insulating
glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20016782A
Other languages
Japanese (ja)
Inventor
Mutsumi Matsuo
睦 松尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP20016782A priority Critical patent/JPS5989436A/en
Publication of JPS5989436A publication Critical patent/JPS5989436A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To prevent the pollution in case of forming semiconductor thin film and gate insulating film from occurring by a method wherein overall surface of a glass substrate is coated with silicon oxide film, silicon nitride film, phosphorus glass film and the like to reduce the pollution of installations such as evaporator and heat treatment furnace etc. due to the impurity in a glass substrate. CONSTITUTION:A glass substrate 1 is entirely coated with a coating film such as a silicon oxide film, silicon nitride film, phosphorus glass film and the like. Through these procedures, when a semiconductor thin film 3 and a gate insulating film 4 are formed at high temperature (exceeding 200 deg.C), not only any installation but also the glass substrate 1 including film may be prevented from being polluted through atmosphere in case of forming semiconductor thin film.gate insulating film. On the other hand, in an etching process, either any exuding of impurity from the glass substrate 1 to etching solution or pollution of a device or a jig due to chemical etching such as plasma etching by gaseous plasma may be prevented from occurring.

Description

【発明の詳細な説明】 本発明は、薄膜半導体装置のガラス基板を酸化硅素j摸
、シリコン窒化膜、リンガラス膜等で全面・ 被ふくす
ることによって、ガラス基板からの不純物汚染防止に関
する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to preventing impurity contamination from a glass substrate of a thin film semiconductor device by covering the entire surface of the glass substrate with a silicon oxide film, a silicon nitride film, a phosphorous glass film, or the like.

従来、ソーダ・ガラス、ボロン・シリケート・ガラス、
アルミノ・シリケート・ガラス等のガラス基板上に薄膜
半導体素子を形成する場合、直接ガラス基板上に形成す
るか、薄膜半導体素子を形成するガラス基板の片面だけ
を、酸化硅素膜、シリコン窒化膜、リンガラス膜等で被
ふくしてから、薄膜半導体素子を形成する方式をとって
いる。
Conventionally, soda glass, boron silicate glass,
When forming a thin film semiconductor device on a glass substrate such as alumino, silicate, or glass, it can be formed directly on the glass substrate, or only one side of the glass substrate on which the thin film semiconductor device will be formed can be coated with a silicon oxide film, silicon nitride film, or phosphorus film. A method is used in which a thin film semiconductor element is formed after covering with a glass film or the like.

後者の場合、被ふく膜の効果は、ガラス基板中の不純物
の半導体薄膜への拡散や、ナトリウムイオンのようなア
ルカリ金属イオンの汚染の防止である。
In the latter case, the effect of the covering film is to prevent impurities in the glass substrate from diffusing into the semiconductor thin film and from contaminating alkali metal ions such as sodium ions.

従来のガラス基板上に薄膜トランジスターを形成した半
導体装置の構造を第1図に示す。ガラス基板1の上に、
酸化硅素膜、シリコン窒化膜、リンガラス膜等の被ふく
膜2を片面にのみ形成する。被ふく膜形成においては、
気相から化学反応を媒介として基板上に結晶や非晶質を
被着する方法(以下OVD法と略す)とかスパッタリン
グや蒸着のように、物質を物理的反応で、いったん気体
の状態にした後、堆積させる方法(以下PVD法と略す
)によって行なわれる。前記、OVD法またはPVD法
により膜形成工程及び、膜エツチング工程の繰返しで、
半導体薄股3.ゲート絶縁膜49ゲート電極5を積層し
、ソース、ゲート、ドレイン電極端子6,7.8を形成
し、薄膜トランジスターを作製する。このとき、被ふく
膜2は、ガラス基板1から、被ふく膜2を通じて半導体
薄膜3への不純物の拡散、特にナトリウムイオンの拡散
を防止しているわけであるが、ガラス基板1の裏面(薄
膜トランジスターを形成していない面)や側面は、ガラ
ス基板が露出しているため、工程途中の、蒸着装置や熱
処理炉等の設備装置の汚染を起こしやすく、半導体薄膜
やゲート絶縁膜形成時の汚染の原因となり、素子特性の
信頼性を劣化させる。
FIG. 1 shows the structure of a conventional semiconductor device in which a thin film transistor is formed on a glass substrate. On the glass substrate 1,
A covering film 2 such as a silicon oxide film, a silicon nitride film, or a phosphorus glass film is formed on only one side. In capsule formation,
A method of depositing crystals or amorphous materials on a substrate using a chemical reaction from the gas phase (hereinafter abbreviated as OVD method), sputtering, or vapor deposition, which is a method in which a substance is first turned into a gas state through a physical reaction. , a deposition method (hereinafter abbreviated as PVD method). By repeating the film forming process and film etching process using the OVD method or PVD method,
Semiconductor thin legs 3. A gate insulating film 49 and a gate electrode 5 are stacked, and source, gate, and drain electrode terminals 6, 7.8 are formed to produce a thin film transistor. At this time, the covering film 2 prevents the diffusion of impurities from the glass substrate 1 to the semiconductor thin film 3 through the covering film 2, especially the diffusion of sodium ions. Since the glass substrate is exposed on the side surfaces (on which no transistors are formed), it is easy to contaminate equipment such as evaporation equipment and heat treatment furnaces during the process, and contamination during the formation of semiconductor thin films and gate insulating films. This causes deterioration of reliability of device characteristics.

本発明は、かかる欠点を除去したもので、ガラス基板全
面を、酸化硅素膜、シリコン窒化膜、リンガラス膜等で
被ふくして、ガラス基板中の不純物による蒸着装置や熱
処理炉等の設備装置への汚染を軽減し、強いては、半導
体薄膜やゲート絶縁膜形成時の汚染を防止することを目
的とする。
The present invention eliminates such drawbacks by covering the entire surface of a glass substrate with a silicon oxide film, a silicon nitride film, a phosphorus glass film, etc., and is used for equipment such as evaporation equipment and heat treatment furnaces due to impurities in the glass substrate. The purpose is to reduce contamination of semiconductor thin films and gate insulating films, and to prevent contamination during formation of semiconductor thin films and gate insulating films.

以下、実施例に基づいて本発明の詳細な説明する。第2
図は、本発明の実施例であり、ガラス基板上に薄膜トラ
ンジスターを形成した半導体装置の構造図である。本構
造は、ガラス基板1を酸化硅素膜、シリコン窒化膜、リ
ンガラス膜等の被ふ<M2で完全に全面を被っている。
Hereinafter, the present invention will be described in detail based on Examples. Second
The figure shows an example of the present invention, and is a structural diagram of a semiconductor device in which a thin film transistor is formed on a glass substrate. In this structure, the entire surface of the glass substrate 1 is completely covered with a silicon oxide film, a silicon nitride film, a phosphorus glass film, etc. <M2.

具体的には、0’VD法やPVD法を表裏2回行って両
面及び側面に被ふく膜2を形成するか、ガラス基板を垂
直にたてておいて、表裏同時に堆積できるような低圧の
○VD装置を使うことで被ふく膜2を形成することが可
能である。本発明は、特に半導体薄膜6やゲート絶縁膜
4を高温(200℃以上)中で形成する場合において、
設備装置の汚染を防止するばかりでなく、半導体薄膜・
ゲート絶縁膜形成時にガラス基板1から膜中に雰囲気を
通じて汚染するのを防ぐことが可能になる。また、エツ
チング工程においては、ガラス基板1からエツチング液
へのガラス基板の不純物のしみ出しや、ガスプラズマに
よるプラズマエツチング等の化学的エツチングによる装
置や治具への汚染を防止する。また被ふく膜によってガ
ラス基板の耐薬品性を向上させ、薬品エツチングによる
ガラス基板の凹凸をなくすことができる。またガラス基
板を被ふく膜で被っているためひっかき傷等の機械的損
傷をなくすことが可能である。
Specifically, the 0'VD method or the PVD method is performed twice on the front and back sides to form the coating film 2 on both sides and the sides, or the glass substrate is held vertically and a low-pressure film is applied so that the film can be deposited on both the front and back sides at the same time. ○It is possible to form the covering film 2 by using a VD device. The present invention is particularly advantageous when forming the semiconductor thin film 6 and the gate insulating film 4 at high temperatures (200° C. or higher).
It not only prevents contamination of equipment, but also protects semiconductor thin films and
When forming the gate insulating film, it is possible to prevent contamination from passing through the atmosphere from the glass substrate 1 into the film. Further, in the etching process, impurities from the glass substrate 1 are prevented from seeping into the etching solution, and contamination of equipment and jigs by chemical etching such as plasma etching using gas plasma is prevented. Moreover, the chemical resistance of the glass substrate can be improved by the coating film, and unevenness of the glass substrate caused by chemical etching can be eliminated. Furthermore, since the glass substrate is covered with a coating film, it is possible to eliminate mechanical damage such as scratches.

本発明は、以上の如く、設備装置への汚染をなくすこと
と同時に、半導体薄膜、ゲート絶縁膜形成時において、
半導体薄膜、ゲート絶縁膜中への汚染の軽減及びガラス
基板の化学的エツチングや機械的損瘍をなくす効果を有
する。
As described above, the present invention eliminates contamination of equipment and at the same time, when forming semiconductor thin films and gate insulating films,
It has the effect of reducing contamination in semiconductor thin films and gate insulating films, and eliminating chemical etching and mechanical damage to glass substrates.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、従来のガラス基板上の薄膜半導体装置の構造
であり、第2図は、本発明のガラス基板上の薄膜半導体
装置の構造である。 1・・・・・・ガラス基板 2・・・・・・被ふく膜 3・・・・・・半導体薄膜 4・・・・・・ゲート絶縁膜   □ 5・・・・・・ゲート電極 6・・・・・・ソース電極端子 7・・・・・・ゲート電極端子 8・・・・・・ドレイン電極端子 以上 出願人 株式会社諏訪精工舎
FIG. 1 shows the structure of a conventional thin film semiconductor device on a glass substrate, and FIG. 2 shows the structure of a thin film semiconductor device on a glass substrate according to the present invention. 1... Glass substrate 2... Covering film 3... Semiconductor thin film 4... Gate insulating film □ 5... Gate electrode 6. ...Source electrode terminal 7 ...Gate electrode terminal 8 ...Drain electrode terminal and above Applicant Suwa Seikosha Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] ガラス基板上に薄膜半導体素子を形成する薄膜半導体装
置の製造方法において、ガラス基板の全面を酸化硅素膜
、シリコン窒化膜、リンガラス等の薄膜で被ふくした後
に薄膜半導体素子を形成する薄膜半導体装置の製造方法
A method for manufacturing a thin film semiconductor device in which a thin film semiconductor element is formed on a glass substrate, in which a thin film semiconductor element is formed after the entire surface of the glass substrate is covered with a thin film such as a silicon oxide film, a silicon nitride film, or a phosphorus glass. manufacturing method.
JP20016782A 1982-11-15 1982-11-15 Manufacture of thin film semiconductor device Pending JPS5989436A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20016782A JPS5989436A (en) 1982-11-15 1982-11-15 Manufacture of thin film semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20016782A JPS5989436A (en) 1982-11-15 1982-11-15 Manufacture of thin film semiconductor device

Publications (1)

Publication Number Publication Date
JPS5989436A true JPS5989436A (en) 1984-05-23

Family

ID=16419902

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20016782A Pending JPS5989436A (en) 1982-11-15 1982-11-15 Manufacture of thin film semiconductor device

Country Status (1)

Country Link
JP (1) JPS5989436A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6794681B2 (en) * 1997-03-18 2004-09-21 Semiconductor Energy Laboratory Co., Ltd. Substrate of semiconductor device and fabrication method thereof as well as semiconductor device and fabrication method thereof
US6849872B1 (en) 1991-08-26 2005-02-01 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor
US7019385B1 (en) 1996-04-12 2006-03-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6849872B1 (en) 1991-08-26 2005-02-01 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor
US7855106B2 (en) 1991-08-26 2010-12-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US7019385B1 (en) 1996-04-12 2006-03-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating same
US7838968B2 (en) 1996-04-12 2010-11-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating same
US6794681B2 (en) * 1997-03-18 2004-09-21 Semiconductor Energy Laboratory Co., Ltd. Substrate of semiconductor device and fabrication method thereof as well as semiconductor device and fabrication method thereof
US7141462B2 (en) 1997-03-18 2006-11-28 Semiconductor Energy Laboratory Co., Ltd. Substrate of semiconductor device and fabrication method thereof as well as semiconductor device and fabrication method thereof

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