JPS58164326U - Output circuit - Google Patents

Output circuit

Info

Publication number
JPS58164326U
JPS58164326U JP6062882U JP6062882U JPS58164326U JP S58164326 U JPS58164326 U JP S58164326U JP 6062882 U JP6062882 U JP 6062882U JP 6062882 U JP6062882 U JP 6062882U JP S58164326 U JPS58164326 U JP S58164326U
Authority
JP
Japan
Prior art keywords
output circuit
current source
final stage
transistors
variable current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6062882U
Other languages
Japanese (ja)
Other versions
JPH0314864Y2 (en
Inventor
真木 佐藤
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP6062882U priority Critical patent/JPS58164326U/en
Publication of JPS58164326U publication Critical patent/JPS58164326U/en
Application granted granted Critical
Publication of JPH0314864Y2 publication Critical patent/JPH0314864Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Picture Signal Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Networks Using Active Elements (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の出力回路の一例を示す接続図、第2図及
び第3図はその動作説明図、第4図はこの考案に係る出
力回路の一例を示す接続図である。 1はCCD、Qlは終段MO3)ランジスタ、2はクラ
ンプ回路、5は可変電流源である。
FIG. 1 is a connection diagram showing an example of a conventional output circuit, FIGS. 2 and 3 are diagrams explaining its operation, and FIG. 4 is a connection diagram showing an example of the output circuit according to the invention. 1 is a CCD, Ql is a final stage MO3) transistor, 2 is a clamp circuit, and 5 is a variable current source.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 終段MOSトランジスタの出力端にクランプ回路とMO
S トランジスタで構成された可変電流源が設けられた
出力回路。
A clamp circuit and MO are connected to the output terminal of the final stage MOS transistor.
S Output circuit equipped with a variable current source composed of transistors.
JP6062882U 1982-04-26 1982-04-26 Output circuit Granted JPS58164326U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6062882U JPS58164326U (en) 1982-04-26 1982-04-26 Output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6062882U JPS58164326U (en) 1982-04-26 1982-04-26 Output circuit

Publications (2)

Publication Number Publication Date
JPS58164326U true JPS58164326U (en) 1983-11-01
JPH0314864Y2 JPH0314864Y2 (en) 1991-04-02

Family

ID=30070864

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6062882U Granted JPS58164326U (en) 1982-04-26 1982-04-26 Output circuit

Country Status (1)

Country Link
JP (1) JPS58164326U (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015098039A1 (en) * 2013-12-25 2015-07-02 株式会社ソシオネクスト Signal potential conversion circuit

Also Published As

Publication number Publication date
JPH0314864Y2 (en) 1991-04-02

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