JPS5799780A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5799780A
JPS5799780A JP55176723A JP17672380A JPS5799780A JP S5799780 A JPS5799780 A JP S5799780A JP 55176723 A JP55176723 A JP 55176723A JP 17672380 A JP17672380 A JP 17672380A JP S5799780 A JPS5799780 A JP S5799780A
Authority
JP
Japan
Prior art keywords
layer
substrate
constitution
dust
decrease
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55176723A
Other languages
Japanese (ja)
Inventor
Takeshi Yamano
Junichi Mihashi
Takayuki Matsukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55176723A priority Critical patent/JPS5799780A/en
Publication of JPS5799780A publication Critical patent/JPS5799780A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To decrease occupied area, and to prevent the effect of a defect due to dust, etc. by vertically forming a MOS transistor to the surface of a substrate. CONSTITUTION:The P type Si substrate 1 is separated by a SiO2 film 2, and an N layer 3 is diffused annularly. A P layer 4 and an N layer 5 are formed selectively onto the substrate surrounded by the N layer 3, including one part of the layer 3. Gate oxide films 14, gate electrodes 6 and a protective oxide film 7 are shaped, and electrodes 8-13 are attached. According to this constitution, a parallel circuit of the four vertical FETs with the sources 3, the drains 5, channels 15 (layer 4 side sections) and the gates 6 is obtained the occupied area is reduced, the defects due to dust, etc. on the surface of an element also decrease, and yield is improved.
JP55176723A 1980-12-11 1980-12-11 Semiconductor device Pending JPS5799780A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55176723A JPS5799780A (en) 1980-12-11 1980-12-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55176723A JPS5799780A (en) 1980-12-11 1980-12-11 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5799780A true JPS5799780A (en) 1982-06-21

Family

ID=16018645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55176723A Pending JPS5799780A (en) 1980-12-11 1980-12-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5799780A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6070757A (en) * 1983-09-28 1985-04-22 Hitachi Ltd Semiconductor integrated circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5574174A (en) * 1978-11-30 1980-06-04 Toshiba Corp Interpolation type insulating gate field effect transistor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5574174A (en) * 1978-11-30 1980-06-04 Toshiba Corp Interpolation type insulating gate field effect transistor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6070757A (en) * 1983-09-28 1985-04-22 Hitachi Ltd Semiconductor integrated circuit
JPH0527267B2 (en) * 1983-09-28 1993-04-20 Hitachi Ltd

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