JPS5789476A - Dry etching method - Google Patents

Dry etching method

Info

Publication number
JPS5789476A
JPS5789476A JP16431380A JP16431380A JPS5789476A JP S5789476 A JPS5789476 A JP S5789476A JP 16431380 A JP16431380 A JP 16431380A JP 16431380 A JP16431380 A JP 16431380A JP S5789476 A JPS5789476 A JP S5789476A
Authority
JP
Japan
Prior art keywords
contact hole
wafer
film
etching process
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16431380A
Other languages
Japanese (ja)
Inventor
Tsunetoshi Arikado
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP16431380A priority Critical patent/JPS5789476A/en
Publication of JPS5789476A publication Critical patent/JPS5789476A/en
Pending legal-status Critical Current

Links

Landscapes

  • ing And Chemical Polishing (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE: To easily remove etching residue, when an etched pattern is formed in an oxide film on the surface of a Si wafer in a dry etching process involving reactive ion etching, by irradiating laser beams to the etched part.
CONSTITUTION: A phosphorus silicide glass film 15 is accumulated on the whole surface of a field oxide film 12, a gate oxide film 13 and a gate electrode 14 on a silicon wafer 11. This glass film-formed Si wafer is heated to diffuse phosphorus into the surface layer of the wafer 11. Thus, a cource and drains 16a, 16b as n+ type diffusion layers are formed. Thereafter, a positive photoresist film 17 is applied to the film 15, and a contact hole-forming resist pattern is formed by an optical etching process. A contact hole 18 is then formed in a reactive ion etching process using the gaseous mixture of CF4 and H2. Laser beams are irradiated to the contact hole 18 in vacuo, to remove C, F-contng. residue the hole 18. Thus, the electric resistance of the contact hole 18 is reduced.
COPYRIGHT: (C)1982,JPO&Japio
JP16431380A 1980-11-21 1980-11-21 Dry etching method Pending JPS5789476A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16431380A JPS5789476A (en) 1980-11-21 1980-11-21 Dry etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16431380A JPS5789476A (en) 1980-11-21 1980-11-21 Dry etching method

Publications (1)

Publication Number Publication Date
JPS5789476A true JPS5789476A (en) 1982-06-03

Family

ID=15790763

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16431380A Pending JPS5789476A (en) 1980-11-21 1980-11-21 Dry etching method

Country Status (1)

Country Link
JP (1) JPS5789476A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60253230A (en) * 1984-05-29 1985-12-13 Mitsubishi Electric Corp Formation of fine pattern
US4875971A (en) * 1987-04-05 1989-10-24 Elron Electronic Industries, Ltd. Fabrication of customized integrated circuits
US4924287A (en) * 1985-01-20 1990-05-08 Avner Pdahtzur Personalizable CMOS gate array device and technique
CN108155144A (en) * 2016-12-02 2018-06-12 中芯国际集成电路制造(上海)有限公司 A kind of production method of semiconductor devices

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60253230A (en) * 1984-05-29 1985-12-13 Mitsubishi Electric Corp Formation of fine pattern
US4924287A (en) * 1985-01-20 1990-05-08 Avner Pdahtzur Personalizable CMOS gate array device and technique
US4875971A (en) * 1987-04-05 1989-10-24 Elron Electronic Industries, Ltd. Fabrication of customized integrated circuits
CN108155144A (en) * 2016-12-02 2018-06-12 中芯国际集成电路制造(上海)有限公司 A kind of production method of semiconductor devices

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