JPS5779772A - Fadar circuit - Google Patents

Fadar circuit

Info

Publication number
JPS5779772A
JPS5779772A JP55155542A JP15554280A JPS5779772A JP S5779772 A JPS5779772 A JP S5779772A JP 55155542 A JP55155542 A JP 55155542A JP 15554280 A JP15554280 A JP 15554280A JP S5779772 A JPS5779772 A JP S5779772A
Authority
JP
Japan
Prior art keywords
circuit
face
fade
practicable
attenuation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55155542A
Other languages
Japanese (ja)
Inventor
Tadashi Eshiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP55155542A priority Critical patent/JPS5779772A/en
Publication of JPS5779772A publication Critical patent/JPS5779772A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/222Studio circuitry; Studio devices; Studio equipment
    • H04N5/262Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/265Mixing

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Studio Circuits (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

PURPOSE:To prevent fade-in and face-out from inversion and to make accurate the operation, by providing a circuit discriminating whether the face-in or face- out is practicable. CONSTITUTION:A discrimination circuit 3 discriminates whether fade-in or fade- out is practicable and an output signal of high level is produced to a corresponding output terminal 8 or 9. The output signal is converted to a waveform having a slope determined with a time constant CR in an integration circuit 4, applied to an attenuation circuit 5 as a control signal, and the attenuation is controlled. A video signal is inputted to an input terminal 6 at the attenuator 5 and outputted from an output terminal 7.
JP55155542A 1980-11-05 1980-11-05 Fadar circuit Pending JPS5779772A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55155542A JPS5779772A (en) 1980-11-05 1980-11-05 Fadar circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55155542A JPS5779772A (en) 1980-11-05 1980-11-05 Fadar circuit

Publications (1)

Publication Number Publication Date
JPS5779772A true JPS5779772A (en) 1982-05-19

Family

ID=15608324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55155542A Pending JPS5779772A (en) 1980-11-05 1980-11-05 Fadar circuit

Country Status (1)

Country Link
JP (1) JPS5779772A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6362477A (en) * 1986-09-03 1988-03-18 Hitachi Ltd Camera integrated vtr
US5245436A (en) * 1992-02-14 1993-09-14 Intel Corporation Method and apparatus for detecting fades in digital video sequences

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6362477A (en) * 1986-09-03 1988-03-18 Hitachi Ltd Camera integrated vtr
US5245436A (en) * 1992-02-14 1993-09-14 Intel Corporation Method and apparatus for detecting fades in digital video sequences

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