JPS5764933A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5764933A JPS5764933A JP14098480A JP14098480A JPS5764933A JP S5764933 A JPS5764933 A JP S5764933A JP 14098480 A JP14098480 A JP 14098480A JP 14098480 A JP14098480 A JP 14098480A JP S5764933 A JPS5764933 A JP S5764933A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- pattern
- film
- wire
- polysilicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Abstract
PURPOSE:To prevent the disconnection and the shortcircuiting of an upper layer wire of a semiconductor device by forming a thin film pattern with a resist pattern, then removing the prescribed quantity of the side surface of the resist, etching the prescribed thickness of the exposed pattern, thereby alleviating the stepwise difference of a multilayer wiring configuration. CONSTITUTION:In the step of, for example, forming a gate polysilicon pattern of an MOSIC, a polysilicon film is selectively etched with a resist mask 5, and a gate electrode 41 and a wire 42 are formed. The side surface of the mask 5 is so removed thereafter by a method, e.g., a treatment with an O2 gas plasma (or illumination of ultraviolet rays for development) or the like that only a resist film 50 remains only on the center of the patterns 41, 42. Subsequently, the exposed patterns 41, 42 are, for example, etched and removed in the amount of approx. 1/3 of the thickness of the polysilicon film by a sputtering etching. In this manner the step coverage of the interlayer film can be improved, thereby facilitating the formation of the electrode wire formed via the interlayer film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14098480A JPS5764933A (en) | 1980-10-07 | 1980-10-07 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14098480A JPS5764933A (en) | 1980-10-07 | 1980-10-07 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5764933A true JPS5764933A (en) | 1982-04-20 |
Family
ID=15281419
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14098480A Pending JPS5764933A (en) | 1980-10-07 | 1980-10-07 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5764933A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6395643B1 (en) * | 1998-05-29 | 2002-05-28 | Applied Materials, Inc. | Gas manifold for uniform gas distribution and photochemistry |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54105476A (en) * | 1978-02-06 | 1979-08-18 | Sony Corp | Manufacture of semiconductor device |
-
1980
- 1980-10-07 JP JP14098480A patent/JPS5764933A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54105476A (en) * | 1978-02-06 | 1979-08-18 | Sony Corp | Manufacture of semiconductor device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6395643B1 (en) * | 1998-05-29 | 2002-05-28 | Applied Materials, Inc. | Gas manifold for uniform gas distribution and photochemistry |
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