JPS5745965A - Semiconductor element connecting substrate - Google Patents
Semiconductor element connecting substrateInfo
- Publication number
- JPS5745965A JPS5745965A JP12150280A JP12150280A JPS5745965A JP S5745965 A JPS5745965 A JP S5745965A JP 12150280 A JP12150280 A JP 12150280A JP 12150280 A JP12150280 A JP 12150280A JP S5745965 A JPS5745965 A JP S5745965A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- pad
- element connecting
- transparent
- sio2
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
PURPOSE:To obtain a semiconductor element connecting substrate inexpensively in high yield by superposing an intimately contacting metal and a barrier metal on a transparent insulator substrate having an optically planar surface to form conductor wires and covering the substrate with an SiO2 while maintaining transparent except the pad of the conductor wires. CONSTITUTION:Ti 8 is deposited on a quartz substrate 7 having an optically planar surface, a barrier metal 9, e.g., Cu or the like is deposited on the substrate, is etched in desired dimension and shape, and wires are formed. Then, an SiO2 10 is grown in gas phase on the overall srface, is etched to expose the internal pad, Au is then plated to form a bump 11. Since a fine pattern can be formed by a photographic etching method and the substrate 7 is further transparent, the pad of the element and the pad of the sbustrate can be acculately aligned, thereby improving the connecting accuracy. With this configuration the element connecting substrate with pads of more than 200 pins can be stably obtained in high yield.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12150280A JPS5745965A (en) | 1980-09-02 | 1980-09-02 | Semiconductor element connecting substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12150280A JPS5745965A (en) | 1980-09-02 | 1980-09-02 | Semiconductor element connecting substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5745965A true JPS5745965A (en) | 1982-03-16 |
Family
ID=14812768
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12150280A Pending JPS5745965A (en) | 1980-09-02 | 1980-09-02 | Semiconductor element connecting substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5745965A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61170840U (en) * | 1985-04-05 | 1986-10-23 | ||
JPS63172810A (en) * | 1987-01-13 | 1988-07-16 | Rinnai Corp | Forced draft type burner |
KR100339016B1 (en) * | 1998-10-02 | 2002-10-25 | 한국과학기술원 | multi-chip package of millimeter wave band using quartz base |
-
1980
- 1980-09-02 JP JP12150280A patent/JPS5745965A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61170840U (en) * | 1985-04-05 | 1986-10-23 | ||
JPS63172810A (en) * | 1987-01-13 | 1988-07-16 | Rinnai Corp | Forced draft type burner |
JPH0445724B2 (en) * | 1987-01-13 | 1992-07-27 | Rinnai Kk | |
KR100339016B1 (en) * | 1998-10-02 | 2002-10-25 | 한국과학기술원 | multi-chip package of millimeter wave band using quartz base |
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