JPS57209569A - Memory access device in vector processor system - Google Patents

Memory access device in vector processor system

Info

Publication number
JPS57209569A
JPS57209569A JP9491081A JP9491081A JPS57209569A JP S57209569 A JPS57209569 A JP S57209569A JP 9491081 A JP9491081 A JP 9491081A JP 9491081 A JP9491081 A JP 9491081A JP S57209569 A JPS57209569 A JP S57209569A
Authority
JP
Japan
Prior art keywords
switching circuit
control
bidirectional bus
control information
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9491081A
Other languages
Japanese (ja)
Other versions
JPS6116115B2 (en
Inventor
Mikio Ito
Hiroshi Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9491081A priority Critical patent/JPS57209569A/en
Publication of JPS57209569A publication Critical patent/JPS57209569A/en
Publication of JPS6116115B2 publication Critical patent/JPS6116115B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)

Abstract

PURPOSE:To obtain the mechanism for a data bus and a switching circuit with high speed and economical capabilities, by locating the switching circuit at the bidirectional bus memory side. CONSTITUTION:A bidirectional bus 31 is connected exclusively for an access pipeline unit 9(A) and a bidirectional bus 32 is provided exclusively for an access pipeline unit 1U(B). THe connection control for a switching circuit 33 is made with a pipeline control section 42 of a memory control unit 5. The control section 42 is provided with shift registers (A) and (B) storing control information corresponding to the access pipelines (A) and (B). The shift registers (A) and (B) are driven with a clock, the control information is outputted at the position of timing corresponding to the location of digit where the control information is stored and control signals required in the memory control unit as well as a connection instructing signal to a switching circuit 33 can be supplied via a decoder.
JP9491081A 1981-06-19 1981-06-19 Memory access device in vector processor system Granted JPS57209569A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9491081A JPS57209569A (en) 1981-06-19 1981-06-19 Memory access device in vector processor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9491081A JPS57209569A (en) 1981-06-19 1981-06-19 Memory access device in vector processor system

Publications (2)

Publication Number Publication Date
JPS57209569A true JPS57209569A (en) 1982-12-22
JPS6116115B2 JPS6116115B2 (en) 1986-04-28

Family

ID=14123159

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9491081A Granted JPS57209569A (en) 1981-06-19 1981-06-19 Memory access device in vector processor system

Country Status (1)

Country Link
JP (1) JPS57209569A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128342A (en) * 1985-11-29 1987-06-10 Fujitsu Ltd Memory access control system
JPH021086A (en) * 1987-11-06 1990-01-05 Oryx Corp Cross bar switch

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128342A (en) * 1985-11-29 1987-06-10 Fujitsu Ltd Memory access control system
JPH0350301B2 (en) * 1985-11-29 1991-08-01 Fujitsu Ltd
JPH021086A (en) * 1987-11-06 1990-01-05 Oryx Corp Cross bar switch

Also Published As

Publication number Publication date
JPS6116115B2 (en) 1986-04-28

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