JPS5488749A - Information processor - Google Patents

Information processor

Info

Publication number
JPS5488749A
JPS5488749A JP15715777A JP15715777A JPS5488749A JP S5488749 A JPS5488749 A JP S5488749A JP 15715777 A JP15715777 A JP 15715777A JP 15715777 A JP15715777 A JP 15715777A JP S5488749 A JPS5488749 A JP S5488749A
Authority
JP
Japan
Prior art keywords
circuit
information
register
output
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15715777A
Other languages
Japanese (ja)
Other versions
JPS5827540B2 (en
Inventor
Hidekazu Minami
Katsuteru Nagafuku
Giichi Iwai
Nobuo Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP52157157A priority Critical patent/JPS5827540B2/en
Publication of JPS5488749A publication Critical patent/JPS5488749A/en
Publication of JPS5827540B2 publication Critical patent/JPS5827540B2/en
Expired legal-status Critical Current

Links

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To ensure the logout when a failure is taken place in the operation circuit, by transferring the information of register via the bus connection circuit in parallel with the operation circuit, in the processor having the function of logout for the register information to the main memory unit.
CONSTITUTION: In the information processor having the function to logout the information of the register 1 to the main memory unit 11, the input bus line 2 transferring the information of the register 1 to the operation circuit 5 and the bus connection circuit 7, and the output bus line 6 connected to the write-in data register 10 writing in the output information of the circuit 7 or the output of the operation circuit 5 to the unit 1, are provided. Further, the series circuit of the input register 3 or 4, operation circuit 5, and the output gate circuit 8, and the circuit 7 are connected in parallel with the input and output bus lines 2 and 6, and the bus selection control FF12 connected to the control circuit 13 is connected to the circuits 7 and 8, allowing to transfer the information 1 of the register 1 via the circuit 7 with selection by the control circuit 15.
COPYRIGHT: (C)1979,JPO&Japio
JP52157157A 1977-12-26 1977-12-26 information processing equipment Expired JPS5827540B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52157157A JPS5827540B2 (en) 1977-12-26 1977-12-26 information processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52157157A JPS5827540B2 (en) 1977-12-26 1977-12-26 information processing equipment

Publications (2)

Publication Number Publication Date
JPS5488749A true JPS5488749A (en) 1979-07-14
JPS5827540B2 JPS5827540B2 (en) 1983-06-10

Family

ID=15643422

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52157157A Expired JPS5827540B2 (en) 1977-12-26 1977-12-26 information processing equipment

Country Status (1)

Country Link
JP (1) JPS5827540B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58149529U (en) * 1982-03-31 1983-10-07 いすゞ自動車株式会社 Insulation structure of waste gate valve device
JPS6088035U (en) * 1983-11-24 1985-06-17 昭和アルミニウム株式会社 Wastegate valve heat dissipation device

Also Published As

Publication number Publication date
JPS5827540B2 (en) 1983-06-10

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