JPS57188850A - Sealing method for semiconductor element - Google Patents

Sealing method for semiconductor element

Info

Publication number
JPS57188850A
JPS57188850A JP56073742A JP7374281A JPS57188850A JP S57188850 A JPS57188850 A JP S57188850A JP 56073742 A JP56073742 A JP 56073742A JP 7374281 A JP7374281 A JP 7374281A JP S57188850 A JPS57188850 A JP S57188850A
Authority
JP
Japan
Prior art keywords
hole
semiconductor element
adhesives
cover plate
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56073742A
Other languages
Japanese (ja)
Inventor
Kaoru Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56073742A priority Critical patent/JPS57188850A/en
Publication of JPS57188850A publication Critical patent/JPS57188850A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16151Cap comprising an aperture, e.g. for pressure control, encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To prevent the generation of a path in an adhesive section by forming a through-hole to a cover plate mounted to a substrate for a circuit on which the semiconductor element is placed, bonding the cover plate and sealing the through-hole through an ultrasonic welding means. CONSTITUTION:The semiconductor element 1 is mounted outo the circuit substrate 3 with conductor patterns 4, the element 1 and the conductor patterns 4 are connected by metallic small wires 5, and the cover plate 6 with the through hole 7 is set up to the substrate 3 by adhesives 8 and the adhesives are heated and cured. A plate 9 with a projection 9A for joining is placed so as to clog the through-hole 7, and the through-hole is welded under an airtight condition by means of an ultrasonic tool. Accordingly, the generation of air-permeable holes (the paths) in the adhesives 8 with the heating and temperature rise of a bonding process is prevented, and the semiconductor element is sealed positively in an airtight manner.
JP56073742A 1981-05-15 1981-05-15 Sealing method for semiconductor element Pending JPS57188850A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56073742A JPS57188850A (en) 1981-05-15 1981-05-15 Sealing method for semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56073742A JPS57188850A (en) 1981-05-15 1981-05-15 Sealing method for semiconductor element

Publications (1)

Publication Number Publication Date
JPS57188850A true JPS57188850A (en) 1982-11-19

Family

ID=13526992

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56073742A Pending JPS57188850A (en) 1981-05-15 1981-05-15 Sealing method for semiconductor element

Country Status (1)

Country Link
JP (1) JPS57188850A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS601895A (en) * 1983-06-17 1985-01-08 株式会社村田製作所 Electronic part and method of producing same
US5081327A (en) * 1990-03-28 1992-01-14 Cabot Corporation Sealing system for hermetic microchip packages
EP0921565A3 (en) * 1997-12-08 2005-07-27 Kabushiki Kaisha Toshiba Package for semiconductor power device and method for assembling the same
JP2015029145A (en) * 2014-10-14 2015-02-12 オリンパス株式会社 Mounting structure and manufacturing method of imaging unit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566456A (en) * 1979-06-26 1981-01-23 Mitsubishi Electric Corp Packaging method of semiconductor device
JPS5623755A (en) * 1979-08-01 1981-03-06 Hitachi Ltd Assembly of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566456A (en) * 1979-06-26 1981-01-23 Mitsubishi Electric Corp Packaging method of semiconductor device
JPS5623755A (en) * 1979-08-01 1981-03-06 Hitachi Ltd Assembly of semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS601895A (en) * 1983-06-17 1985-01-08 株式会社村田製作所 Electronic part and method of producing same
JPH0249037B2 (en) * 1983-06-17 1990-10-26 Murata Manufacturing Co
US5081327A (en) * 1990-03-28 1992-01-14 Cabot Corporation Sealing system for hermetic microchip packages
EP0921565A3 (en) * 1997-12-08 2005-07-27 Kabushiki Kaisha Toshiba Package for semiconductor power device and method for assembling the same
JP2015029145A (en) * 2014-10-14 2015-02-12 オリンパス株式会社 Mounting structure and manufacturing method of imaging unit

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