JPS57141129A - Semiconductor circuit - Google Patents

Semiconductor circuit

Info

Publication number
JPS57141129A
JPS57141129A JP56026150A JP2615081A JPS57141129A JP S57141129 A JPS57141129 A JP S57141129A JP 56026150 A JP56026150 A JP 56026150A JP 2615081 A JP2615081 A JP 2615081A JP S57141129 A JPS57141129 A JP S57141129A
Authority
JP
Japan
Prior art keywords
dielectric strength
base
circuit
emitter
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56026150A
Other languages
Japanese (ja)
Inventor
Shinji Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56026150A priority Critical patent/JPS57141129A/en
Publication of JPS57141129A publication Critical patent/JPS57141129A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/088Transistor-transistor logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)

Abstract

PURPOSE:To increase the dielectric strength of an output stage circuit by providing a switch circuit to the base of the output-stage transistor (TR) of a Darlington circuit. CONSTITUTION:A Darlington circuit consists of TRs 21 and 23. A TR26 interposed between the TR23 and the ground turns on and off according to the inverted signal of an enable signal. The dielectric strength viewed from an output terminal OUT to the ground potential is the sum of the base-emitter dielectric strength of the TR23 and the collector-base dielectric strength of the TR26 when the base and emitter are short-circuited, so the dielectric strength is increased.
JP56026150A 1981-02-26 1981-02-26 Semiconductor circuit Pending JPS57141129A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56026150A JPS57141129A (en) 1981-02-26 1981-02-26 Semiconductor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56026150A JPS57141129A (en) 1981-02-26 1981-02-26 Semiconductor circuit

Publications (1)

Publication Number Publication Date
JPS57141129A true JPS57141129A (en) 1982-09-01

Family

ID=12185501

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56026150A Pending JPS57141129A (en) 1981-02-26 1981-02-26 Semiconductor circuit

Country Status (1)

Country Link
JP (1) JPS57141129A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5980022A (en) * 1982-09-28 1984-05-09 モノリシツク・メモリ−ズ・インコ−ポレイテツド Active output disable circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5980022A (en) * 1982-09-28 1984-05-09 モノリシツク・メモリ−ズ・インコ−ポレイテツド Active output disable circuit

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