JPS56137717A - Current miller circuit - Google Patents

Current miller circuit

Info

Publication number
JPS56137717A
JPS56137717A JP4088280A JP4088280A JPS56137717A JP S56137717 A JPS56137717 A JP S56137717A JP 4088280 A JP4088280 A JP 4088280A JP 4088280 A JP4088280 A JP 4088280A JP S56137717 A JPS56137717 A JP S56137717A
Authority
JP
Japan
Prior art keywords
current
miller circuit
source
fetf1
trq7
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4088280A
Other languages
Japanese (ja)
Inventor
Teruo Inuzuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4088280A priority Critical patent/JPS56137717A/en
Publication of JPS56137717A publication Critical patent/JPS56137717A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26Current mirrors
    • G05F3/267Current mirrors using both bipolar and field-effect technology

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To eliminate the error of the ratio between an input current and output current due to a base current, by constituting a current Miller circuit by combining bipolar transistors with FET. CONSTITUTION:In the current Miller circuit, the emitters of the 1st and 2nd bipolar pnp (or npn) transistors TRQ6 and TRQ7 whose bases are connected mutually are connected to the common terminal and current source Ic and p (or n) channel FETF1 is connected at the source to the connection point of the bases of TRs Q6 and Q7; and the gate of FETF1 and the collector of TRQ6 are connected together as an input terminal, the drain is connected to voltage source V1, and the collector of TRQ7 is used as an output terminal. Current I1 is equal to Ic6-IG. In this case, IG is extremely small in general. Therefore, I1 may be equal to Ic6. Further, current I2 is determined by emitter area ratio 1:n of TRs Q6 and Q7, so that I2=nIc6. Therefore, I2=nI1 and there is no error.
JP4088280A 1980-03-28 1980-03-28 Current miller circuit Pending JPS56137717A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4088280A JPS56137717A (en) 1980-03-28 1980-03-28 Current miller circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4088280A JPS56137717A (en) 1980-03-28 1980-03-28 Current miller circuit

Publications (1)

Publication Number Publication Date
JPS56137717A true JPS56137717A (en) 1981-10-27

Family

ID=12592875

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4088280A Pending JPS56137717A (en) 1980-03-28 1980-03-28 Current miller circuit

Country Status (1)

Country Link
JP (1) JPS56137717A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59211307A (en) * 1983-05-16 1984-11-30 Nec Corp Current mirror circuit
JPH01166607A (en) * 1987-12-22 1989-06-30 Mitsubishi Electric Corp Constant current generating circuit
FR2641627A1 (en) * 1989-01-11 1990-07-13 Sgs Thomson Microelectronics IMPROVEMENT TO CIRCUITS MIRRORS OF CURRENTS
EP0429268A2 (en) * 1989-11-17 1991-05-29 Kabushiki Kaisha Toshiba Current-mirror circuit with buffering transistor
JP2003133867A (en) * 2001-10-23 2003-05-09 Olympus Optical Co Ltd Current amplifier circuit and servo error signal producing circuit using the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59211307A (en) * 1983-05-16 1984-11-30 Nec Corp Current mirror circuit
JPH01166607A (en) * 1987-12-22 1989-06-30 Mitsubishi Electric Corp Constant current generating circuit
FR2641627A1 (en) * 1989-01-11 1990-07-13 Sgs Thomson Microelectronics IMPROVEMENT TO CIRCUITS MIRRORS OF CURRENTS
EP0429268A2 (en) * 1989-11-17 1991-05-29 Kabushiki Kaisha Toshiba Current-mirror circuit with buffering transistor
JP2003133867A (en) * 2001-10-23 2003-05-09 Olympus Optical Co Ltd Current amplifier circuit and servo error signal producing circuit using the same

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