JPS5674746A - Data processing unit - Google Patents
Data processing unitInfo
- Publication number
- JPS5674746A JPS5674746A JP15072379A JP15072379A JPS5674746A JP S5674746 A JPS5674746 A JP S5674746A JP 15072379 A JP15072379 A JP 15072379A JP 15072379 A JP15072379 A JP 15072379A JP S5674746 A JPS5674746 A JP S5674746A
- Authority
- JP
- Japan
- Prior art keywords
- data
- multiplexer
- output
- input
- counter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
Abstract
PURPOSE:To make it possible to execute the data input processing with high reliability, by supplying a selective signal of the counter in order from the multiplexer whose response speed is quicker, in the data processing unit which outputs the parallel input data in series. CONSTITUTION:When the counter 11 is made its initial status by a clear signal CLR, the multiplexer 13 input 8 input data one after another, and outputs the output data in series to the output terminal Q. Subsequently, when the counter 11 counts a clock pulse CLK, and the output terminals 2<3>, 2<4> become 1 and 0, a selective signal of the multiplexer 14 is output to the output terminal 1 of the decoder 12, the multiplexer 14 inputs the input data one afrer another, and each data is output in series. When the output terminals 2<3>, 2<4> of the counter 11 become 0 and 1, the multiplexer 15 is operated. Since the response speed of the multiplexers 13- 15 is made slower in order, a wrong data is never input.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15072379A JPS5674746A (en) | 1979-11-22 | 1979-11-22 | Data processing unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15072379A JPS5674746A (en) | 1979-11-22 | 1979-11-22 | Data processing unit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5674746A true JPS5674746A (en) | 1981-06-20 |
Family
ID=15502993
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15072379A Pending JPS5674746A (en) | 1979-11-22 | 1979-11-22 | Data processing unit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5674746A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62152228A (en) * | 1985-12-25 | 1987-07-07 | Yokogawa Electric Corp | Parallel/serial converting circuit |
| JPS62158334A (en) * | 1985-12-28 | 1987-07-14 | Teru Saamuko Kk | Opening and closing apparatus |
| US8031233B2 (en) | 2002-02-12 | 2011-10-04 | Sony Corporation | Solid-state image pickup device and method with time division video signal outputs |
-
1979
- 1979-11-22 JP JP15072379A patent/JPS5674746A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62152228A (en) * | 1985-12-25 | 1987-07-07 | Yokogawa Electric Corp | Parallel/serial converting circuit |
| JPS62158334A (en) * | 1985-12-28 | 1987-07-14 | Teru Saamuko Kk | Opening and closing apparatus |
| JPH03772B2 (en) * | 1985-12-28 | 1991-01-08 | Tokyo Erekutoron Sagami Kk | |
| US8031233B2 (en) | 2002-02-12 | 2011-10-04 | Sony Corporation | Solid-state image pickup device and method with time division video signal outputs |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5647125A (en) | Delay circuit | |
| JPS5674746A (en) | Data processing unit | |
| GB1363707A (en) | Synchronous buffer unit | |
| JPS5622134A (en) | Asynchronous system serial data receiving device | |
| SU517164A1 (en) | Pulse counter with controllable conversion factor | |
| JPS54116951A (en) | Optical delay circuit | |
| JPS56129452A (en) | Synchronous control system | |
| SU1480102A1 (en) | Sequential pulse shaper | |
| SU1734208A1 (en) | Multiinput counter | |
| SU809036A1 (en) | Device for finding the middle of a time interval | |
| SU1469563A1 (en) | Telegraph signal distortion simulator | |
| SU484645A1 (en) | Pulse frequency division device | |
| SU1485224A1 (en) | Data input unit | |
| SU1005031A1 (en) | Device for comparing numbers | |
| SU1280600A1 (en) | Information input device | |
| SU612414A1 (en) | Frequency divider | |
| SU991593A1 (en) | Single pulse shaper | |
| SU697990A1 (en) | Random number generator | |
| SU1195428A1 (en) | Device for generating pulse trains | |
| SU947952A2 (en) | Pulse duration discriminator | |
| SU765804A1 (en) | Squaring device | |
| SU1008894A1 (en) | Pulse shaper | |
| SU425337A1 (en) | DEVICE FOR ALLOCATION OF A SINGLE PULSE \ | |
| SU853635A1 (en) | Device for forming synchronization pulses in data reading | |
| SU875608A1 (en) | Device for programmed delay of pulses |