JPS5665578A - Two dimensional solidstate image sensor - Google Patents
Two dimensional solidstate image sensorInfo
- Publication number
- JPS5665578A JPS5665578A JP14232379A JP14232379A JPS5665578A JP S5665578 A JPS5665578 A JP S5665578A JP 14232379 A JP14232379 A JP 14232379A JP 14232379 A JP14232379 A JP 14232379A JP S5665578 A JPS5665578 A JP S5665578A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- signal charge
- shift register
- charge
- group
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
PURPOSE:To enable high speed readout and to increase the utilizing factor of photosensing plane, by making the carrying CCD shift register group unnecessary and forming the part with the impurity dope layer of reverse conduction type and the semiconductor substrate constituted with the sensor. CONSTITUTION:The photodetection plane is formed with a plurality of carrying gates GT of band shape and the impurity dope layer D of opposite conduction type as the substrate mainly. Further, if the applied voltage of a vertical shift register 2 to a terminal is zero, the well beneath each video element group is disappeared and the signal charge group stored in it is moved in the layer D via each channel at a bundle. A signal charge Qs is superimposed on the charge Qt in thermal equilibrium state in the layer D as excessive charges. When a voltage is fed to a readout gate GR, the signal charge group Qs in the layer D is fed to each stage in the CCD shift register B at a bundle. Since the transfer of the charge Qs is made in dielectric buffer time in the order of 10<-13>sec, the transfer time of the signal charge can be made short.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14232379A JPS5665578A (en) | 1979-10-31 | 1979-10-31 | Two dimensional solidstate image sensor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14232379A JPS5665578A (en) | 1979-10-31 | 1979-10-31 | Two dimensional solidstate image sensor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5665578A true JPS5665578A (en) | 1981-06-03 |
Family
ID=15312668
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14232379A Pending JPS5665578A (en) | 1979-10-31 | 1979-10-31 | Two dimensional solidstate image sensor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5665578A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52137210A (en) * | 1976-05-12 | 1977-11-16 | Matsushita Electric Ind Co Ltd | Solid taking image device |
JPS5451318A (en) * | 1977-09-29 | 1979-04-23 | Sony Corp | Solid pickup unit |
-
1979
- 1979-10-31 JP JP14232379A patent/JPS5665578A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52137210A (en) * | 1976-05-12 | 1977-11-16 | Matsushita Electric Ind Co Ltd | Solid taking image device |
JPS5451318A (en) * | 1977-09-29 | 1979-04-23 | Sony Corp | Solid pickup unit |
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