JPS5664446A - Method of molding synthetic resin insert for metal terminal, metal terminal and mold - Google Patents

Method of molding synthetic resin insert for metal terminal, metal terminal and mold

Info

Publication number
JPS5664446A
JPS5664446A JP13964779A JP13964779A JPS5664446A JP S5664446 A JPS5664446 A JP S5664446A JP 13964779 A JP13964779 A JP 13964779A JP 13964779 A JP13964779 A JP 13964779A JP S5664446 A JPS5664446 A JP S5664446A
Authority
JP
Japan
Prior art keywords
mold
metal terminal
solder
terminal
burr
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13964779A
Other languages
Japanese (ja)
Other versions
JPS612288B2 (en
Inventor
Kiyoshi Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PESHITSUKU KK
Original Assignee
PESHITSUKU KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PESHITSUKU KK filed Critical PESHITSUKU KK
Priority to JP13964779A priority Critical patent/JPS5664446A/en
Publication of JPS5664446A publication Critical patent/JPS5664446A/en
Publication of JPS612288B2 publication Critical patent/JPS612288B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/14Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
    • B29C45/14639Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
    • B29C45/14655Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)

Abstract

PURPOSE:To mold an insert by covering the entire surface of the metal terminal body beforehand with a solder having softer property than the body, maintaining the mold temperature lower than 175+ or -5 deg.C, press-fitting synthetic resin into a cavity, thereby preventing a burr. CONSTITUTION:The comblike part except the connecting part of a terminal element 7 is covered with a solder film having softer property than the body, a semiconductor is connected to the insert side, and is sealed with a resin layer 21. Subsequently, it is set in the cavity 6 of the mold 10, the exposed part of the terminal 7 is disposed in a groove 8, and is temporarily positioned with a pin 9 and a hole 19. When the molds are tightened, the exposed part of the terminal 7 will slide on the oblique surface 22 of the groove 8 by a presser 24 due to the oblique surface 23 of the mold 18 to be retained at desired position. Thus, the insert is correctly set in the cavity 6. When the mold temperature is maintained lower than 175+ or -5 deg.C and the resin is press-fitted into the mold, the solder layer is softened and is thus filled in the facing surfaces of the mold to be sealed therein. Accordingly, no burr is produced in the molding. If the molding temperature is high, the solder is flowed out to cause a burr. According to this configuration the assembling work for a complete product can be easily conducted.
JP13964779A 1979-10-29 1979-10-29 Method of molding synthetic resin insert for metal terminal, metal terminal and mold Granted JPS5664446A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13964779A JPS5664446A (en) 1979-10-29 1979-10-29 Method of molding synthetic resin insert for metal terminal, metal terminal and mold

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13964779A JPS5664446A (en) 1979-10-29 1979-10-29 Method of molding synthetic resin insert for metal terminal, metal terminal and mold

Publications (2)

Publication Number Publication Date
JPS5664446A true JPS5664446A (en) 1981-06-01
JPS612288B2 JPS612288B2 (en) 1986-01-23

Family

ID=15250137

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13964779A Granted JPS5664446A (en) 1979-10-29 1979-10-29 Method of molding synthetic resin insert for metal terminal, metal terminal and mold

Country Status (1)

Country Link
JP (1) JPS5664446A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59204245A (en) * 1983-05-06 1984-11-19 Mitsubishi Electric Corp Resin sealing process of semicondutor device
JPS60220922A (en) * 1985-04-01 1985-11-05 日立エーアイシー株式会社 Chip type capacitor
JPS6165460A (en) * 1984-09-07 1986-04-04 Toshiba Corp Semiconductor molding method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0530456Y2 (en) * 1987-02-04 1993-08-04

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59204245A (en) * 1983-05-06 1984-11-19 Mitsubishi Electric Corp Resin sealing process of semicondutor device
JPS6361775B2 (en) * 1983-05-06 1988-11-30
JPS6165460A (en) * 1984-09-07 1986-04-04 Toshiba Corp Semiconductor molding method
JPS60220922A (en) * 1985-04-01 1985-11-05 日立エーアイシー株式会社 Chip type capacitor
JPH0330977B2 (en) * 1985-04-01 1991-05-01 Hitachi Ee Ai Shii Kk

Also Published As

Publication number Publication date
JPS612288B2 (en) 1986-01-23

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