JPS566427A - Etching method - Google Patents

Etching method

Info

Publication number
JPS566427A
JPS566427A JP8168879A JP8168879A JPS566427A JP S566427 A JPS566427 A JP S566427A JP 8168879 A JP8168879 A JP 8168879A JP 8168879 A JP8168879 A JP 8168879A JP S566427 A JPS566427 A JP S566427A
Authority
JP
Japan
Prior art keywords
holder
film
semiconductor substrate
etching
polycrystaline
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8168879A
Other languages
Japanese (ja)
Inventor
Juro Yasui
Kiyohiro Kawasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8168879A priority Critical patent/JPS566427A/en
Publication of JPS566427A publication Critical patent/JPS566427A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • C23C16/4587—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially vertically
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To prevent the damage to a semiconductor substrate holder due to overetching during the etching removal of an insulator film attached in the vapor phase growth by coating it with an etching resistant thin film beforehand. CONSTITUTION:The semiconductor substrate holder 5 alone is inserted into a reaction tube heated by means of the LPCVD device (pressure reduction chemical phase accumulation) and coated on the surface with a polycrystaline Si film about 0.5mum thick under the reduced pressure by thermal cracking of SiH4 gas. As one coating is not enough because the contact portion with the inner wall of the tube may not be yet covered sufficiently or may be insufficient in thickness even if it covered entirely. Another polycrystaline Si film is formed on the holder 5 under the same conditions by turning it upside down. The holder thus treated is used to form the Si3N4 on the semiconductor substrate by the normal LPCVD method. This can protect the holder from any etching even if the Si3N4 film is removed emmersed in the HF liquid after used several time.
JP8168879A 1979-06-28 1979-06-28 Etching method Pending JPS566427A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8168879A JPS566427A (en) 1979-06-28 1979-06-28 Etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8168879A JPS566427A (en) 1979-06-28 1979-06-28 Etching method

Publications (1)

Publication Number Publication Date
JPS566427A true JPS566427A (en) 1981-01-23

Family

ID=13753286

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8168879A Pending JPS566427A (en) 1979-06-28 1979-06-28 Etching method

Country Status (1)

Country Link
JP (1) JPS566427A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6458707B1 (en) 1999-07-16 2002-10-01 Nec Corporation Tool for semiconductor manufacturing apparatus and method for using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6458707B1 (en) 1999-07-16 2002-10-01 Nec Corporation Tool for semiconductor manufacturing apparatus and method for using the same

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