JPS5647982A - Cash memory control system - Google Patents
Cash memory control systemInfo
- Publication number
- JPS5647982A JPS5647982A JP12393279A JP12393279A JPS5647982A JP S5647982 A JPS5647982 A JP S5647982A JP 12393279 A JP12393279 A JP 12393279A JP 12393279 A JP12393279 A JP 12393279A JP S5647982 A JPS5647982 A JP S5647982A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- data
- cash
- signal
- write
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
Abstract
PURPOSE: To hold the indentity of data between a main memory device and cash memory unit in a computer system by rewriting corresponding data in the cash memory as well in responce to a write-in request of a memory bus.
CONSTITUTION: Stack 28 monitors memory bus 7 and, when a write-in request to main memory device 1 is made, is supplied with the address information and data information and after data are inputted, signal 29 is sent to cash memory controller 21. Controller 21 sends the address and data from stack 28 to comparator 22, and memory parts 24 and 25 with selective signal 32. When comparator 22 obtains identity signal 37, controller 21 sends write-in signal 33 to memory part 25 to equalize data in cash memory 2 to those in main memory.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12393279A JPS5647982A (en) | 1979-09-28 | 1979-09-28 | Cash memory control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12393279A JPS5647982A (en) | 1979-09-28 | 1979-09-28 | Cash memory control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5647982A true JPS5647982A (en) | 1981-04-30 |
Family
ID=14872911
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12393279A Pending JPS5647982A (en) | 1979-09-28 | 1979-09-28 | Cash memory control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5647982A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5236431A (en) * | 1975-09-17 | 1977-03-19 | Toshiba Corp | Cash memory control system |
JPS5464944A (en) * | 1977-11-02 | 1979-05-25 | Fujitsu Ltd | Buffer invalidating system for multi-cpu system |
-
1979
- 1979-09-28 JP JP12393279A patent/JPS5647982A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5236431A (en) * | 1975-09-17 | 1977-03-19 | Toshiba Corp | Cash memory control system |
JPS5464944A (en) * | 1977-11-02 | 1979-05-25 | Fujitsu Ltd | Buffer invalidating system for multi-cpu system |
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