JPS57114966A - Computer system - Google Patents

Computer system

Info

Publication number
JPS57114966A
JPS57114966A JP119381A JP119381A JPS57114966A JP S57114966 A JPS57114966 A JP S57114966A JP 119381 A JP119381 A JP 119381A JP 119381 A JP119381 A JP 119381A JP S57114966 A JPS57114966 A JP S57114966A
Authority
JP
Japan
Prior art keywords
information
graphic information
line
graphic
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP119381A
Other languages
Japanese (ja)
Inventor
Sakae Yanagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP119381A priority Critical patent/JPS57114966A/en
Publication of JPS57114966A publication Critical patent/JPS57114966A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/0007—Image acquisition

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Bus Control (AREA)
  • Processing Or Creating Images (AREA)

Abstract

PURPOSE:To prevent decrease of performance of a system and data processing efficiency, by splitting the system bus into graphic information buses and code information buses, in a computer system handling graphic information and code information. CONSTITUTION:When graphic information is transmitted to a system unit 100 from an in-line data station 200, a data station 202 transmits transaction information to a local line conrol processor 105 via a code information in-line bus 401. The graphic information is in multiplex control and transmitted to a local line control processor 106 via a graphic information in-line bus 400. Thereafter, a system control processor 103 processes the graphic information stored in a temporary buffer memory 111 temporarily based on the address information and the transaction information.
JP119381A 1981-01-09 1981-01-09 Computer system Pending JPS57114966A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP119381A JPS57114966A (en) 1981-01-09 1981-01-09 Computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP119381A JPS57114966A (en) 1981-01-09 1981-01-09 Computer system

Publications (1)

Publication Number Publication Date
JPS57114966A true JPS57114966A (en) 1982-07-17

Family

ID=11494614

Family Applications (1)

Application Number Title Priority Date Filing Date
JP119381A Pending JPS57114966A (en) 1981-01-09 1981-01-09 Computer system

Country Status (1)

Country Link
JP (1) JPS57114966A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62192867A (en) * 1986-02-20 1987-08-24 Mitsubishi Electric Corp Work station handling image data
JPS62192866A (en) * 1986-02-20 1987-08-24 Mitsubishi Electric Corp Image data processor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62192867A (en) * 1986-02-20 1987-08-24 Mitsubishi Electric Corp Work station handling image data
JPS62192866A (en) * 1986-02-20 1987-08-24 Mitsubishi Electric Corp Image data processor

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