JPS5637674A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5637674A
JPS5637674A JP11379779A JP11379779A JPS5637674A JP S5637674 A JPS5637674 A JP S5637674A JP 11379779 A JP11379779 A JP 11379779A JP 11379779 A JP11379779 A JP 11379779A JP S5637674 A JPS5637674 A JP S5637674A
Authority
JP
Japan
Prior art keywords
layer
trapezoidal shape
region
base
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11379779A
Other languages
Japanese (ja)
Other versions
JPS6346583B2 (en
Inventor
Reiji Takashina
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11379779A priority Critical patent/JPS5637674A/en
Publication of JPS5637674A publication Critical patent/JPS5637674A/en
Publication of JPS6346583B2 publication Critical patent/JPS6346583B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To simplify the steps of manufacturing a semiconductor device by forming a base region in a semiconductor substrate, forming a polycrystalline Si layer of predetermined pattern making contact therewith, and forming a part of the side surface thereof of a trapezoidal shape or the other part thereof of a inverted trapezoidal shape, thereby eliminating a plated conductive passage metal. CONSTITUTION:An insulating layer 2 is coated on a semiconductor substrate 1, an opening is perforated thereat, a base region 3 is formed in the substrate 1, and polycrystalline Si layers 4 and 14 having a great deal of impurity and no impurity respectively are laminated on the entire surface thereof. Then, an insulating layer 13 corresponding to emitter electrode pattern is formed thereon by a photoetching process using a resist film 15 formed thereon, the exposed portion of the layer 14 is etched and removed with the layer 13 as a mask, and the thickness of the layer 4 thereunder is reduced to a half thereof. Thereafter, a resist 16 is coated on the emitter.base shortcircuiting portion, the exposed portion of the layer 4 is etched and removed, the layer 4 is formed in cross section in a trapezoidal shape 12 and the general cross sectional portion between the layers 4 and 14 is formed in inverted trapezoidal shape 11, and there are then formed as ordinary way an wmitter region 5, an insulating layer 6, a base coutact region 7, and an electrode 8 or the like.
JP11379779A 1979-09-05 1979-09-05 Manufacture of semiconductor device Granted JPS5637674A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11379779A JPS5637674A (en) 1979-09-05 1979-09-05 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11379779A JPS5637674A (en) 1979-09-05 1979-09-05 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5637674A true JPS5637674A (en) 1981-04-11
JPS6346583B2 JPS6346583B2 (en) 1988-09-16

Family

ID=14621316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11379779A Granted JPS5637674A (en) 1979-09-05 1979-09-05 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5637674A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01174963U (en) * 1988-05-30 1989-12-13
JPH03296222A (en) * 1990-04-13 1991-12-26 Nec Corp Semiconductor device and its manufacture

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01174963U (en) * 1988-05-30 1989-12-13
JPH03296222A (en) * 1990-04-13 1991-12-26 Nec Corp Semiconductor device and its manufacture

Also Published As

Publication number Publication date
JPS6346583B2 (en) 1988-09-16

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