JPS56158443A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS56158443A JPS56158443A JP6123280A JP6123280A JPS56158443A JP S56158443 A JPS56158443 A JP S56158443A JP 6123280 A JP6123280 A JP 6123280A JP 6123280 A JP6123280 A JP 6123280A JP S56158443 A JPS56158443 A JP S56158443A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- sio2
- polysi
- type
- ions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76245—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using full isolation by porous oxide silicon, i.e. FIPOS techniques
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To separate elements from each other by a method wherein an N-layer piled on a P type substrate through an SiO2 film is partially converted into a P- layer, the N-layer is oxydized under the mask of P-layer after making it porous to remove SiO2 by etching. CONSTITUTION:SiO2 12 on a P type Si substrate 1 is piled with P type polySi 13. Giving a resisting mask 14 P type impurities ions are injected to make a P-layer 15. Subsequently the P type impurities ions are injected into an N-layer 13 to selectively convert a surface portion into the P-layer 16. Next in the HF solution only the P-layer 16 is anodized to be converted porous. (In the case of the N-layer it is treated in the HF solution under ultraviolet irradiation). By wet oxydation only polySi is converted into SiO2 17. Next under the mask of polySi 16 SiO2 17 is removed by reactive ions etching and further the polySi 16 is removed to form a field reverse prevention ions treated layer and an insulating film in the self-matching relation. This constitution can separate the device with high density without lowering performance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6123280A JPS56158443A (en) | 1980-05-10 | 1980-05-10 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6123280A JPS56158443A (en) | 1980-05-10 | 1980-05-10 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56158443A true JPS56158443A (en) | 1981-12-07 |
Family
ID=13165263
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6123280A Pending JPS56158443A (en) | 1980-05-10 | 1980-05-10 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56158443A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5342803A (en) * | 1993-02-03 | 1994-08-30 | Rohm, Co., Ltd. | Method for isolating circuit elements for semiconductor device |
-
1980
- 1980-05-10 JP JP6123280A patent/JPS56158443A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5342803A (en) * | 1993-02-03 | 1994-08-30 | Rohm, Co., Ltd. | Method for isolating circuit elements for semiconductor device |
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