JPS56129432A - Frequency synchronizing circuit - Google Patents
Frequency synchronizing circuitInfo
- Publication number
- JPS56129432A JPS56129432A JP3167580A JP3167580A JPS56129432A JP S56129432 A JPS56129432 A JP S56129432A JP 3167580 A JP3167580 A JP 3167580A JP 3167580 A JP3167580 A JP 3167580A JP S56129432 A JPS56129432 A JP S56129432A
- Authority
- JP
- Japan
- Prior art keywords
- output
- signal
- frequency
- multiplier
- fed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000003044 adaptive effect Effects 0.000 abstract 1
- 230000006835 compression Effects 0.000 abstract 1
- 238000007906 compression Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PURPOSE:To form the frequency synchronizing circuit having quick frequency catching range and high-frequency error compression ratio, by giving a simple adaptive control function to AFC circuit. CONSTITUTION:The input signal 101 at input terminal In and the output signal 102 of the voltage controlled oscillator 1 are compared with the phase at the phase comparator 3, the output 109 is fed to a multiplier 6, and the signal passing through the pi/2 phase shifter 2 and the compared output at the phase comparator 4 with the input signal 101 are fed to a low-pass filter 5' in which the time constant T5 is made variable with the control signal 106 externally. The output 105 of the filter 5' is fed to a feedback loop of a multiplier 8, low pass filter LPE, voltage adder 10 and DC amplifier 12 to control the time constant of the filter 5' according to the polarity of the output of amplifier, allowing stably the rate control. The output signal 105 is multiplied with the signal from the comparator 109 at the multiplier 6, and the resultant is outputted from the oscillator 1 after being smoothed at the low-pass filter 7, allowing to produce maximum frequency discriminating voltage to the frequency error.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3167580A JPS56129432A (en) | 1980-03-14 | 1980-03-14 | Frequency synchronizing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3167580A JPS56129432A (en) | 1980-03-14 | 1980-03-14 | Frequency synchronizing circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56129432A true JPS56129432A (en) | 1981-10-09 |
JPS6320052B2 JPS6320052B2 (en) | 1988-04-26 |
Family
ID=12337685
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3167580A Granted JPS56129432A (en) | 1980-03-14 | 1980-03-14 | Frequency synchronizing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56129432A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58182323A (en) * | 1982-04-20 | 1983-10-25 | Nec Corp | Phase locked loop circuit |
-
1980
- 1980-03-14 JP JP3167580A patent/JPS56129432A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58182323A (en) * | 1982-04-20 | 1983-10-25 | Nec Corp | Phase locked loop circuit |
EP0092442A2 (en) * | 1982-04-20 | 1983-10-26 | Nec Corporation | Phase synchronizing circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS6320052B2 (en) | 1988-04-26 |
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