JPS56122541A - Hybrid circuit - Google Patents

Hybrid circuit

Info

Publication number
JPS56122541A
JPS56122541A JP2642080A JP2642080A JPS56122541A JP S56122541 A JPS56122541 A JP S56122541A JP 2642080 A JP2642080 A JP 2642080A JP 2642080 A JP2642080 A JP 2642080A JP S56122541 A JPS56122541 A JP S56122541A
Authority
JP
Japan
Prior art keywords
circuit
balanced circuits
input terminal
plural
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2642080A
Other languages
English (en)
Inventor
Masao Yamazawa
Masaaki Ogiso
Nobuhisa Kamoi
Hiroshi Kodera
Masaharu Shimada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP2642080A priority Critical patent/JPS56122541A/ja
Publication of JPS56122541A publication Critical patent/JPS56122541A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H04B1/54—Circuits using the same frequency for two directions of communication
    • H04B1/58—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
    • H04B1/583—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa using a bridge network
    • H04B1/585—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa using a bridge network with automatic balancing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
JP2642080A 1980-03-03 1980-03-03 Hybrid circuit Pending JPS56122541A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2642080A JPS56122541A (en) 1980-03-03 1980-03-03 Hybrid circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2642080A JPS56122541A (en) 1980-03-03 1980-03-03 Hybrid circuit

Publications (1)

Publication Number Publication Date
JPS56122541A true JPS56122541A (en) 1981-09-26

Family

ID=12193033

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2642080A Pending JPS56122541A (en) 1980-03-03 1980-03-03 Hybrid circuit

Country Status (1)

Country Link
JP (1) JPS56122541A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6042946A (ja) * 1983-07-22 1985-03-07 プレツシ−　オ−バ−シ−ズ　リミテツド 適応線路ハイブリツド回路
WO2006001301A1 (ja) * 2004-06-25 2006-01-05 Evolvable Systems Research Institute Inc. 伝送装置および伝送方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120511A (ja) * 1974-03-07 1975-09-20
JPS5248949A (en) * 1975-10-17 1977-04-19 Nippon Hoso Kyokai <Nhk> Line impedance matching unit
JPS5489459A (en) * 1977-12-27 1979-07-16 Nec Corp Two wire-four wire converter circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120511A (ja) * 1974-03-07 1975-09-20
JPS5248949A (en) * 1975-10-17 1977-04-19 Nippon Hoso Kyokai <Nhk> Line impedance matching unit
JPS5489459A (en) * 1977-12-27 1979-07-16 Nec Corp Two wire-four wire converter circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6042946A (ja) * 1983-07-22 1985-03-07 プレツシ−　オ−バ−シ−ズ　リミテツド 適応線路ハイブリツド回路
WO2006001301A1 (ja) * 2004-06-25 2006-01-05 Evolvable Systems Research Institute Inc. 伝送装置および伝送方法
JPWO2006001301A1 (ja) * 2004-06-25 2008-04-17 株式会社進化システム総合研究所 伝送装置および伝送方法

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