JPS56105530A - Mode designating system - Google Patents
Mode designating systemInfo
- Publication number
- JPS56105530A JPS56105530A JP805780A JP805780A JPS56105530A JP S56105530 A JPS56105530 A JP S56105530A JP 805780 A JP805780 A JP 805780A JP 805780 A JP805780 A JP 805780A JP S56105530 A JPS56105530 A JP S56105530A
- Authority
- JP
- Japan
- Prior art keywords
- voice
- mode
- cpu5
- name
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/16—Sound input; Sound output
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Audiology, Speech & Language Pathology (AREA)
- General Health & Medical Sciences (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Cash Registers Or Receiving Machines (AREA)
- Input From Keyboards Or The Like (AREA)
Abstract
PURPOSE:To prevent the operator's misoperation by outputting the name of the mode designated by a mode change-over means by means of voice with a voice generating means, in an electronic register or the like. CONSTITUTION:The CPU5 of an electronic register is connected with a totalling memory 6, a mode switch SW7 and a voice controller CT8. An R/W signal is outputted from the CPU5 to an I/O port 2 and the memory 6, and further, chip designating signals CSI, CSII are outputted respectively to the SW7 and the CT8. The SW7 changes over modes such as registration, setting, inspection, adjustment or the like by the designation of the signal CSI, and wrties the code corresponding to the set mode into the CPU5. The voice designating data are applied to a voice buffer TB by the designation of the CSII, according to which the CT8 designates the address of a voice data memory part 9. In the memory part 9, the voice data of the mode name of the SW7 has been stored, and according to the assigned address, the voice data are D/A converted 10, and the designated mode name is sounded from a speaker 13 via a filter 11 and an amplifier 12.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP805780A JPS56105530A (en) | 1980-01-25 | 1980-01-25 | Mode designating system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP805780A JPS56105530A (en) | 1980-01-25 | 1980-01-25 | Mode designating system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56105530A true JPS56105530A (en) | 1981-08-22 |
Family
ID=11682695
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP805780A Pending JPS56105530A (en) | 1980-01-25 | 1980-01-25 | Mode designating system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56105530A (en) |
-
1980
- 1980-01-25 JP JP805780A patent/JPS56105530A/en active Pending
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