JPS5584090A - Stack control system for logic control unit - Google Patents

Stack control system for logic control unit

Info

Publication number
JPS5584090A
JPS5584090A JP16083078A JP16083078A JPS5584090A JP S5584090 A JPS5584090 A JP S5584090A JP 16083078 A JP16083078 A JP 16083078A JP 16083078 A JP16083078 A JP 16083078A JP S5584090 A JPS5584090 A JP S5584090A
Authority
JP
Japan
Prior art keywords
data
stack
undesired
field
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16083078A
Other languages
Japanese (ja)
Inventor
Setsuo Shimada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16083078A priority Critical patent/JPS5584090A/en
Publication of JPS5584090A publication Critical patent/JPS5584090A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells

Landscapes

  • Executing Machine-Instructions (AREA)
  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)
  • Memory System (AREA)

Abstract

PURPOSE:To secure the high-efficiency use of the stack by displaying the undesired data with every data unit in the data group row stored in the stack. CONSTITUTION:Stack data buffer 9' consists of identification field 23' and data field 19'. When the undesired identification control data is applied to ineffective control 15', the contents of field 23' is read out. And when this contents is in agreement with the identification control data, circuit 15' carries out the ineffective display for the contents of field 23'. This control is given to all data that are stored in buffer 9'. Then the data stored in buffer 9' are read out via the reading signal given from reading control circuit 6'. In that case, the data having the undesired display are thrown away, and accordingly no undesired data is transmitted. In such way, the undesired process is given for the time during which the data stored is read out, thus ensuring the high-efficiency use of the stack.
JP16083078A 1978-12-19 1978-12-19 Stack control system for logic control unit Pending JPS5584090A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16083078A JPS5584090A (en) 1978-12-19 1978-12-19 Stack control system for logic control unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16083078A JPS5584090A (en) 1978-12-19 1978-12-19 Stack control system for logic control unit

Publications (1)

Publication Number Publication Date
JPS5584090A true JPS5584090A (en) 1980-06-24

Family

ID=15723322

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16083078A Pending JPS5584090A (en) 1978-12-19 1978-12-19 Stack control system for logic control unit

Country Status (1)

Country Link
JP (1) JPS5584090A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57211646A (en) * 1981-06-22 1982-12-25 Fujitsu Ltd Subroutine controlling system
JP2012212472A (en) * 2006-07-26 2012-11-01 Semiconductor Energy Lab Co Ltd Program and semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57211646A (en) * 1981-06-22 1982-12-25 Fujitsu Ltd Subroutine controlling system
JPS6148738B2 (en) * 1981-06-22 1986-10-25 Fujitsu Ltd
JP2012212472A (en) * 2006-07-26 2012-11-01 Semiconductor Energy Lab Co Ltd Program and semiconductor device

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