JPS56100586A - Ipl system in decentralized processing electronic exchanger - Google Patents

Ipl system in decentralized processing electronic exchanger

Info

Publication number
JPS56100586A
JPS56100586A JP376280A JP376280A JPS56100586A JP S56100586 A JPS56100586 A JP S56100586A JP 376280 A JP376280 A JP 376280A JP 376280 A JP376280 A JP 376280A JP S56100586 A JPS56100586 A JP S56100586A
Authority
JP
Japan
Prior art keywords
program
processing device
memory
processing electronic
decentralized processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP376280A
Other languages
Japanese (ja)
Inventor
Masahito Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP376280A priority Critical patent/JPS56100586A/en
Publication of JPS56100586A publication Critical patent/JPS56100586A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508—Configuration, initialisation
    • H04Q3/54516—Initialization, software or data downloading
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/1305—Software aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13109—Initializing, personal profile
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13376—Information service, downloading of information, 0800/0900 services

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE:To reduce the number of program file memories, by loading the initial program to the slave processing device from the external program film memory of the master processing device. CONSTITUTION:Master processing device 1 and slave processing device 2 are provided with main memories 10 and 20, central control units 11 and 21, and data channel devices 12 and 22 respectively. Main control part 41 of control device 4 is started by key 5 to cause device 1 to perform IPL. Device 1 stores the program from magnetic tape device 3 into memory 10. Next, device 1 reads the program to be stored in device 2 and transfers the program to memory 20 through information transfer devices 62 and 61.
JP376280A 1980-01-17 1980-01-17 Ipl system in decentralized processing electronic exchanger Pending JPS56100586A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP376280A JPS56100586A (en) 1980-01-17 1980-01-17 Ipl system in decentralized processing electronic exchanger

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP376280A JPS56100586A (en) 1980-01-17 1980-01-17 Ipl system in decentralized processing electronic exchanger

Publications (1)

Publication Number Publication Date
JPS56100586A true JPS56100586A (en) 1981-08-12

Family

ID=11566178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP376280A Pending JPS56100586A (en) 1980-01-17 1980-01-17 Ipl system in decentralized processing electronic exchanger

Country Status (1)

Country Link
JP (1) JPS56100586A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010129212A1 (en) * 2009-04-28 2010-11-11 Bose Corporation Anr circuit with external circuit cooperation
US8144890B2 (en) 2009-04-28 2012-03-27 Bose Corporation ANR settings boot loading
US8280066B2 (en) 2009-04-28 2012-10-02 Bose Corporation Binaural feedforward-based ANR

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010129212A1 (en) * 2009-04-28 2010-11-11 Bose Corporation Anr circuit with external circuit cooperation
US8144890B2 (en) 2009-04-28 2012-03-27 Bose Corporation ANR settings boot loading
US8280066B2 (en) 2009-04-28 2012-10-02 Bose Corporation Binaural feedforward-based ANR

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