JPS5595354A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5595354A
JPS5595354A JP324679A JP324679A JPS5595354A JP S5595354 A JPS5595354 A JP S5595354A JP 324679 A JP324679 A JP 324679A JP 324679 A JP324679 A JP 324679A JP S5595354 A JPS5595354 A JP S5595354A
Authority
JP
Japan
Prior art keywords
resistors
gate
composite resistor
polycrystalline
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP324679A
Other languages
Japanese (ja)
Other versions
JPS6352472B2 (en
Inventor
Kunihiko Yoshimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP324679A priority Critical patent/JPS5595354A/en
Publication of JPS5595354A publication Critical patent/JPS5595354A/en
Publication of JPS6352472B2 publication Critical patent/JPS6352472B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To obtain a MOSIC having a DA converter circuit by providing a series of resistors consisting of polycrystalline Si on an SiO2 film, and forming insulated- gate MOS transistors, in which a part of each of the resistors arranged nearly at equal intervals along the direction of the current flowing here forms a gate. CONSTITUTION:Polycrystalline Si composite resistor 21, consisting of series-connected unit resistors R, is formed on a substrate coated with SiO2 film. Its one end 22 is grounded by means of a metal conductor, and the other end 23 is impressed with reference voltage VREF. The respective gates of MOS transistors 25-1-25-n are connected between the corresponding unit resistors R, and gate voltage is supplied from composite resistor 21. The drains of these transistors are connected jointly to power supply +V by means of wire 24. The respective sources are taken out as analog output 26 via switches S1-Sn. By this, no deterioration occurs on contact points between the switches and the row of resistors. Further, since the composite resistor has no capacitance, no reverse bias effect exists.
JP324679A 1979-01-11 1979-01-11 Semiconductor device Granted JPS5595354A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP324679A JPS5595354A (en) 1979-01-11 1979-01-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP324679A JPS5595354A (en) 1979-01-11 1979-01-11 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5595354A true JPS5595354A (en) 1980-07-19
JPS6352472B2 JPS6352472B2 (en) 1988-10-19

Family

ID=11552092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP324679A Granted JPS5595354A (en) 1979-01-11 1979-01-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5595354A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06295985A (en) * 1993-04-09 1994-10-21 Nec Corp Semiconductor integrated circuit device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06295985A (en) * 1993-04-09 1994-10-21 Nec Corp Semiconductor integrated circuit device

Also Published As

Publication number Publication date
JPS6352472B2 (en) 1988-10-19

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