JPS5591267A - Image pickup device - Google Patents

Image pickup device

Info

Publication number
JPS5591267A
JPS5591267A JP16184878A JP16184878A JPS5591267A JP S5591267 A JPS5591267 A JP S5591267A JP 16184878 A JP16184878 A JP 16184878A JP 16184878 A JP16184878 A JP 16184878A JP S5591267 A JPS5591267 A JP S5591267A
Authority
JP
Japan
Prior art keywords
output
signal
signals
memory
blooming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16184878A
Other languages
Japanese (ja)
Inventor
Yasuhiko Izumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu General Ltd
Gen Co Ltd
Original Assignee
Fujitsu General Ltd
Gen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu General Ltd, Gen Co Ltd filed Critical Fujitsu General Ltd
Priority to JP16184878A priority Critical patent/JPS5591267A/en
Publication of JPS5591267A publication Critical patent/JPS5591267A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To reduce the blooming and thus ensure reproduction for the wholly steady picture by providing the driving circuit which gives the time division to the pickup element plus the simple circuit such as the memory, gate circuit or the like.
CONSTITUTION: When the time-division driving is given to pickup element 3 to send the change storage pulses alternately and every frame cycle, the high- and low- sensitivity pickup signals X and Y emerge alternately at the output end of element 3. At the same time, both X and Y signals emerge alternately also at the output terminal of memory 7 with delay of one frame cycle. Then element 3 is compared with the output of memory 7 at comparator 12, and high-sensitivity gate circuits 8 and 9 operate by the output of the comparison. Thus only signals X are collected at the output side. In this same way, only signals Y are collected at the output of low- sensitivity gate circuits 10 and 11. When signal X exceeds the reference level of terminal 15 after comparison 16, video output gate circuit 13 is closed with gate circuit 14 opened. And these conditions are kept until the signal reaches the reference value. During this period, signal Y is loaded to the blooming region. In case the excessive signal exists in signal Y, comparator 19 gives the control to reduce the pulse duration of driving circuit 5. Thus the image free from blooming can be obtained.
COPYRIGHT: (C)1980,JPO&Japio
JP16184878A 1978-12-29 1978-12-29 Image pickup device Pending JPS5591267A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16184878A JPS5591267A (en) 1978-12-29 1978-12-29 Image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16184878A JPS5591267A (en) 1978-12-29 1978-12-29 Image pickup device

Publications (1)

Publication Number Publication Date
JPS5591267A true JPS5591267A (en) 1980-07-10

Family

ID=15743083

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16184878A Pending JPS5591267A (en) 1978-12-29 1978-12-29 Image pickup device

Country Status (1)

Country Link
JP (1) JPS5591267A (en)

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