JPS558635A - Storage device control system - Google Patents

Storage device control system

Info

Publication number
JPS558635A
JPS558635A JP7989278A JP7989278A JPS558635A JP S558635 A JPS558635 A JP S558635A JP 7989278 A JP7989278 A JP 7989278A JP 7989278 A JP7989278 A JP 7989278A JP S558635 A JPS558635 A JP S558635A
Authority
JP
Japan
Prior art keywords
write
wst
issue
storage device
nclk
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7989278A
Other languages
Japanese (ja)
Other versions
JPS5836440B2 (en
Inventor
Shozo Taniguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP53079892A priority Critical patent/JPS5836440B2/en
Publication of JPS558635A publication Critical patent/JPS558635A/en
Publication of JPS5836440B2 publication Critical patent/JPS5836440B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To shorten the cycle time of a write operation to improve the performance of a storage device by performing the write control after a normal write data check by using four different kinds of clock to control the write start signal. CONSTITUTION:Write start signal WST is generated on a basis of write going signal WGO given together with write data, and write pulses generated at a fixed time after WST issue are controlled by the result of write data check, thereby protecting storage contents. Then, clocks NCLK, ECLK having the phase advanced from NCLK, N'CLK near to NCLK, and E'CLK near to ELCK between the external processing unit and the storage device are used to count ECLKs in 19 and count N'CLKs in 18, and both counted values are compared with each other in 23, and WST issue is controlled by this comparison result, thereby varying the time from WGO issue to WST according to the clock period.
JP53079892A 1978-06-30 1978-06-30 Storage device control method Expired JPS5836440B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53079892A JPS5836440B2 (en) 1978-06-30 1978-06-30 Storage device control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53079892A JPS5836440B2 (en) 1978-06-30 1978-06-30 Storage device control method

Publications (2)

Publication Number Publication Date
JPS558635A true JPS558635A (en) 1980-01-22
JPS5836440B2 JPS5836440B2 (en) 1983-08-09

Family

ID=13702910

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53079892A Expired JPS5836440B2 (en) 1978-06-30 1978-06-30 Storage device control method

Country Status (1)

Country Link
JP (1) JPS5836440B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58122687A (en) * 1982-01-14 1983-07-21 Nec Corp Semiconductor storage device
JPH04107659A (en) * 1990-08-28 1992-04-09 Nec Corp Preventing circuit for miswrite of data to memory

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58122687A (en) * 1982-01-14 1983-07-21 Nec Corp Semiconductor storage device
JPS6245626B2 (en) * 1982-01-14 1987-09-28 Nippon Electric Co
JPH04107659A (en) * 1990-08-28 1992-04-09 Nec Corp Preventing circuit for miswrite of data to memory

Also Published As

Publication number Publication date
JPS5836440B2 (en) 1983-08-09

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