JPS5578340A - Division system - Google Patents
Division systemInfo
- Publication number
- JPS5578340A JPS5578340A JP15252978A JP15252978A JPS5578340A JP S5578340 A JPS5578340 A JP S5578340A JP 15252978 A JP15252978 A JP 15252978A JP 15252978 A JP15252978 A JP 15252978A JP S5578340 A JPS5578340 A JP S5578340A
- Authority
- JP
- Japan
- Prior art keywords
- multiple table
- contents
- digit
- register
- operated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To reduce the number of subtractions to improve considerably the processing speed of operation by generating a multiple table, which is obtained by multiplying an operand by 1...9, previously and comparing an operated number with contents of the multiple table to obtain a division result of each digit.
CONSTITUTION: Memory 17 multiplies an operand by factor N (N is 1...9) to generate a multiple table, and an operated number is compared with contents at respective addresses of the multiple table by 27 successively, and multiple N for change from contents of the multiple table larger than the operated number to contents of the multiple table smaller than it is written in register D 14 as an answer of a digit unit. Then, the output of multiple table generating memory 17 corresponding to the answer of a digit unit is subtracted from the operated number of register B 12, and subtraction contents are shifted by one digit to the left and are written in register A 11, and preset signal AP is outputted from control part 15 to repeat the method for digit units, thus obtaining a division value of a prescribed number of digits in register D 14. As a result, the number of subtractions can be reduced to improve considerably the processing speed of operation.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15252978A JPS5578340A (en) | 1978-12-09 | 1978-12-09 | Division system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15252978A JPS5578340A (en) | 1978-12-09 | 1978-12-09 | Division system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5578340A true JPS5578340A (en) | 1980-06-12 |
Family
ID=15542422
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15252978A Pending JPS5578340A (en) | 1978-12-09 | 1978-12-09 | Division system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5578340A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5862746A (en) * | 1981-09-25 | 1983-04-14 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Divider |
JPH03189817A (en) * | 1989-12-20 | 1991-08-19 | Pfu Ltd | Multiplying/dividing system in arithmetic unit |
-
1978
- 1978-12-09 JP JP15252978A patent/JPS5578340A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5862746A (en) * | 1981-09-25 | 1983-04-14 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Divider |
JPS6256536B2 (en) * | 1981-09-25 | 1987-11-26 | Intaanashonaru Bijinesu Mashiinzu Corp | |
JPH03189817A (en) * | 1989-12-20 | 1991-08-19 | Pfu Ltd | Multiplying/dividing system in arithmetic unit |
JPH0833814B2 (en) * | 1989-12-20 | 1996-03-29 | 株式会社ピーエフユー | Multiplier / divider |
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