JPS5577086A - Semiconductor memory unit - Google Patents
Semiconductor memory unitInfo
- Publication number
- JPS5577086A JPS5577086A JP15150678A JP15150678A JPS5577086A JP S5577086 A JPS5577086 A JP S5577086A JP 15150678 A JP15150678 A JP 15150678A JP 15150678 A JP15150678 A JP 15150678A JP S5577086 A JPS5577086 A JP S5577086A
- Authority
- JP
- Japan
- Prior art keywords
- decoder circuit
- constitution
- circuit
- matrix
- held
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To reduce the current consumption of a decoder circuit by forming this decoder circuit, selecting memory cells in a matrix, of NAND circuit of n-type MOSFET connected in series. CONSTITUTION:Matrix-connected FFs 21... forming memory cells are selected by NAND circuit 37..., and 39... constituting a decoder circuit of series-connected n- type MOSFETs 43, 43', 43''.... In the constitution of those circuits 37..., 39..., an address output is held at a low level only when address bits applied to FETs 43, 43'... are all at high levels, thereby selecting FF21. On the other hand, when one of address bits is at a low level, the address output is held at a high level to set an unselection state, so that gates 37..., and 39... will never consume any current. Therefore, the current consumption of the decoder circuit can be reduced in comparison with the NOR constitution of the decoder circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15150678A JPS5577086A (en) | 1978-12-06 | 1978-12-06 | Semiconductor memory unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15150678A JPS5577086A (en) | 1978-12-06 | 1978-12-06 | Semiconductor memory unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5577086A true JPS5577086A (en) | 1980-06-10 |
Family
ID=15519990
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15150678A Pending JPS5577086A (en) | 1978-12-06 | 1978-12-06 | Semiconductor memory unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5577086A (en) |
-
1978
- 1978-12-06 JP JP15150678A patent/JPS5577086A/en active Pending
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