JPS5575664A - Diagnosis system for microprocessor - Google Patents

Diagnosis system for microprocessor

Info

Publication number
JPS5575664A
JPS5575664A JP15033378A JP15033378A JPS5575664A JP S5575664 A JPS5575664 A JP S5575664A JP 15033378 A JP15033378 A JP 15033378A JP 15033378 A JP15033378 A JP 15033378A JP S5575664 A JPS5575664 A JP S5575664A
Authority
JP
Japan
Prior art keywords
register
state
bus
program
agreement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15033378A
Other languages
Japanese (ja)
Inventor
Shoichi Sushi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Iwatsu Electric Co Ltd
Original Assignee
Iwatsu Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Iwatsu Electric Co Ltd filed Critical Iwatsu Electric Co Ltd
Priority to JP15033378A priority Critical patent/JPS5575664A/en
Publication of JPS5575664A publication Critical patent/JPS5575664A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To enable to store the content of the bus and the internal register at any time point for program execution, by comparing the state of bus of measured system with a given condition and comparing and displaying the content of the internal register when in agreement.
CONSTITUTION: When the microprocessor PC1 executes the program, the state of the data bus and the address bus is changed, and when this state is in agreement 2 with the set condition, the timing circuit 7 is operated, the execution of instruction of PC1 is interrupted, and the returned address memory pulse is given to the register 3 and the state of address bus is stored. On the other hand, the output of the selection circuit 10 selects the selection circuit 8 to execute the program of the analysis memory 1 to PC1. After storing the state of the register in PC1, the program jumps to the returned address of the register 3. Next, the selection circuit 8 is selected, the register state information in the memory 5 is compared 6 with the set condition, and the content of the internal register is displayed 11 in case of agreement.
COPYRIGHT: (C)1980,JPO&Japio
JP15033378A 1978-12-04 1978-12-04 Diagnosis system for microprocessor Pending JPS5575664A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15033378A JPS5575664A (en) 1978-12-04 1978-12-04 Diagnosis system for microprocessor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15033378A JPS5575664A (en) 1978-12-04 1978-12-04 Diagnosis system for microprocessor

Publications (1)

Publication Number Publication Date
JPS5575664A true JPS5575664A (en) 1980-06-07

Family

ID=15494709

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15033378A Pending JPS5575664A (en) 1978-12-04 1978-12-04 Diagnosis system for microprocessor

Country Status (1)

Country Link
JP (1) JPS5575664A (en)

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