JPS5674760A - Data trace system - Google Patents

Data trace system

Info

Publication number
JPS5674760A
JPS5674760A JP15271779A JP15271779A JPS5674760A JP S5674760 A JPS5674760 A JP S5674760A JP 15271779 A JP15271779 A JP 15271779A JP 15271779 A JP15271779 A JP 15271779A JP S5674760 A JPS5674760 A JP S5674760A
Authority
JP
Japan
Prior art keywords
change
logic information
time
memory
timer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15271779A
Other languages
Japanese (ja)
Inventor
Hiroyuki Takizawa
Kenichi Yokoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15271779A priority Critical patent/JPS5674760A/en
Publication of JPS5674760A publication Critical patent/JPS5674760A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To store convergently a changing part of logic information required for an analysis of the logic information by writing the change of the logic information and the time up to the change in the same memory and by converting the traceable amount of logic information from an element of time to that of change extent.
CONSTITUTION: When logic information has no changes, timer 7 is commanded to start the counting of time and writing in memory 5 is inhibited. On the other hand, logic information stored in fetch register group 1 and that in buffer register group 2 are compared mutually, clock by clock, in sequence and when the same event continues and there is no change, timer 7 operates after the information is written in memory 5 once for the 1st time to count the time until the next change is made. Once a change of the logic information is found, timer 7 adds a time mark to time data in memory 5 through OR circuit 4 under the command of control circuit 8 and then stores it. Thus, a change part required for an analysis of the logic information can be stored convergently.
COPYRIGHT: (C)1981,JPO&Japio
JP15271779A 1979-11-26 1979-11-26 Data trace system Pending JPS5674760A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15271779A JPS5674760A (en) 1979-11-26 1979-11-26 Data trace system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15271779A JPS5674760A (en) 1979-11-26 1979-11-26 Data trace system

Publications (1)

Publication Number Publication Date
JPS5674760A true JPS5674760A (en) 1981-06-20

Family

ID=15546608

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15271779A Pending JPS5674760A (en) 1979-11-26 1979-11-26 Data trace system

Country Status (1)

Country Link
JP (1) JPS5674760A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62107978U (en) * 1985-12-26 1987-07-10
US4752928A (en) * 1985-05-06 1988-06-21 Tektronix, Inc. Transaction analyzer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4752928A (en) * 1985-05-06 1988-06-21 Tektronix, Inc. Transaction analyzer
JPS62107978U (en) * 1985-12-26 1987-07-10
JPH0532306Y2 (en) * 1985-12-26 1993-08-18

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