JPS5572062A - Semiconductor device and preparation thereof - Google Patents

Semiconductor device and preparation thereof

Info

Publication number
JPS5572062A
JPS5572062A JP14618078A JP14618078A JPS5572062A JP S5572062 A JPS5572062 A JP S5572062A JP 14618078 A JP14618078 A JP 14618078A JP 14618078 A JP14618078 A JP 14618078A JP S5572062 A JPS5572062 A JP S5572062A
Authority
JP
Japan
Prior art keywords
metallic layer
electrodes
bump electrodes
wire
attached
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14618078A
Other languages
Japanese (ja)
Inventor
Takashi Miyamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14618078A priority Critical patent/JPS5572062A/en
Publication of JPS5572062A publication Critical patent/JPS5572062A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: To prevent attaching section of a semiconductor from occurrence of crack, by providing an electrically isolated metallic layer on the surrounding area of an electrodes when attaching on outside lead, which is composed of metallic pieces, to bump electrodes arranged in surrounding area on a semiconductor pellet.
CONSTITUTION: An Al wire 3 is attached onto a semiconductor pellet 1 through an oxide film 2, and the surface is enclosed with a thick surface protecting film 4 except the region where a bump electrodes 5 are attached, which region is left exposed. And then, the bump electrodes 5 are attached onto the exposed wire 3 by thermal pressing or brazing through a metallic layer 6 for improving adhesion to aluminum and a metallic layer 7 for prevention of dispersion of metal which is composing the bump electrodes 5. In this mechanism, a metallic layer 8 is provided on the film 2 located between the electrode 5, and the top surface is covered with protecting film 4 so as to be electrically isolated from the electrodes 5. By doing so, the pellets surfaces temperature distribution becomes gradual when the wire is attached by thermal pressing, and moreover, by providing the metallic layer 8 for enclosing the electrodes 5, the effect can be further improved.
COPYRIGHT: (C)1980,JPO&Japio
JP14618078A 1978-11-27 1978-11-27 Semiconductor device and preparation thereof Pending JPS5572062A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14618078A JPS5572062A (en) 1978-11-27 1978-11-27 Semiconductor device and preparation thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14618078A JPS5572062A (en) 1978-11-27 1978-11-27 Semiconductor device and preparation thereof

Publications (1)

Publication Number Publication Date
JPS5572062A true JPS5572062A (en) 1980-05-30

Family

ID=15401936

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14618078A Pending JPS5572062A (en) 1978-11-27 1978-11-27 Semiconductor device and preparation thereof

Country Status (1)

Country Link
JP (1) JPS5572062A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5752391A (en) * 1996-01-23 1998-05-19 Nippon Soken, Inc. Refrigerating system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5339084A (en) * 1976-09-22 1978-04-10 Hitachi Ltd Silicon gate mis semiconductor device
JPS53105967A (en) * 1977-02-28 1978-09-14 Nec Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5339084A (en) * 1976-09-22 1978-04-10 Hitachi Ltd Silicon gate mis semiconductor device
JPS53105967A (en) * 1977-02-28 1978-09-14 Nec Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5752391A (en) * 1996-01-23 1998-05-19 Nippon Soken, Inc. Refrigerating system

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