JPS5568767A - Deflecting distortion correction circuit for braun tube monitor - Google Patents
Deflecting distortion correction circuit for braun tube monitorInfo
- Publication number
- JPS5568767A JPS5568767A JP14226178A JP14226178A JPS5568767A JP S5568767 A JPS5568767 A JP S5568767A JP 14226178 A JP14226178 A JP 14226178A JP 14226178 A JP14226178 A JP 14226178A JP S5568767 A JPS5568767 A JP S5568767A
- Authority
- JP
- Japan
- Prior art keywords
- deflection signal
- multiplier
- adder
- output
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Details Of Television Scanning (AREA)
Abstract
PURPOSE:To ensure a quick and high-accuracy correction for the deflecting distortion of the electromagnetic deflection type XY monitor featuring a large deflection angle of the electron beam through the electric technique using the function circuit and the arithmetic circuit. CONSTITUTION:The vertical deflection signal led into 1st input terminal 1 is amplified through buffer amplifier 3 and then applied to square circuit 6 and multiplier 5. Thus the deflection signal is changed into the bowed form and then applied to the input terminal of multiplier 7 after addition of DC level voltage EXO at adder 9 of the output inversion type. The horizontal deflection signal introduced through buffer amplifier 4 and the multiplication waveform of the output of adder 9, i.e., the corrected horizontal deflection signal are led out through the output terminal of multiplier 7. While the horizontal deflection signal introduced to 2nd input terminal 2 receives addition of DC level EYO at adder 5 and via amplifier 4, square circuit 8 and multiplier 7 each, and the multiplication waveform of the vertical deflection signal of amplifier 3 and the output of adder 10, i.e., the corrected vertical deflection signal is led out through the output terminal of multiplier 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14226178A JPS5568767A (en) | 1978-11-20 | 1978-11-20 | Deflecting distortion correction circuit for braun tube monitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14226178A JPS5568767A (en) | 1978-11-20 | 1978-11-20 | Deflecting distortion correction circuit for braun tube monitor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5568767A true JPS5568767A (en) | 1980-05-23 |
Family
ID=15311212
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14226178A Pending JPS5568767A (en) | 1978-11-20 | 1978-11-20 | Deflecting distortion correction circuit for braun tube monitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5568767A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58114576A (en) * | 1981-12-26 | 1983-07-07 | Fujitsu Ltd | Correction circuit for upper and lower pincushion distortion |
| JPS6182522A (en) * | 1984-06-05 | 1986-04-26 | モトロ−ラ・インコ−ポレ−テツド | Time base circuit |
| JPH02119030A (en) * | 1988-10-27 | 1990-05-07 | Metsuku:Kk | Cathode-ray tube and deflection yoke testing device |
-
1978
- 1978-11-20 JP JP14226178A patent/JPS5568767A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58114576A (en) * | 1981-12-26 | 1983-07-07 | Fujitsu Ltd | Correction circuit for upper and lower pincushion distortion |
| JPS6182522A (en) * | 1984-06-05 | 1986-04-26 | モトロ−ラ・インコ−ポレ−テツド | Time base circuit |
| JPH02119030A (en) * | 1988-10-27 | 1990-05-07 | Metsuku:Kk | Cathode-ray tube and deflection yoke testing device |
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