JPS5566042A - Memory control circuit - Google Patents
Memory control circuitInfo
- Publication number
- JPS5566042A JPS5566042A JP13887678A JP13887678A JPS5566042A JP S5566042 A JPS5566042 A JP S5566042A JP 13887678 A JP13887678 A JP 13887678A JP 13887678 A JP13887678 A JP 13887678A JP S5566042 A JPS5566042 A JP S5566042A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- read
- data
- command
- write
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To make it possible that the memory unit side has a TEST&SET instruction by setting a read operation state and a write operation state in the first half and the latter of one operation cycle respectively in respect to memory access.
CONSTITUTION: AND between memory access signal 10 and the result obtained by decoding 6 the signal on address bus 9 is operated in 8C, and memory unit 4 is accessed. Read of read/write command R/W to memory 4 is performed in a low level, and a write command is delayed by a fixed time by delay line 7a and is given to memory 4 through AND gate 8a. Consequently, the read/write command can be defined as a read command in the first half of memory access and can be changed to a write command in the latter at the end of read. In respect to write data, all "1" or "0" data is written in the memory according to presence or absence of signals on command line 11 sent from a processing unit. Read data from memory 4 is transmitted to data bus 12. The response signal for memory access is transmitted to response signal line 13 after delayed by a fixed time in 7b, so that the TEST& SET function can be realized by memory control circuit 5.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13887678A JPS5566042A (en) | 1978-11-13 | 1978-11-13 | Memory control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13887678A JPS5566042A (en) | 1978-11-13 | 1978-11-13 | Memory control circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5566042A true JPS5566042A (en) | 1980-05-19 |
Family
ID=15232169
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13887678A Pending JPS5566042A (en) | 1978-11-13 | 1978-11-13 | Memory control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5566042A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60118961A (en) * | 1983-11-30 | 1985-06-26 | Fujitsu Ltd | Common area access control system of memory |
-
1978
- 1978-11-13 JP JP13887678A patent/JPS5566042A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60118961A (en) * | 1983-11-30 | 1985-06-26 | Fujitsu Ltd | Common area access control system of memory |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5725069A (en) | Vector data processing equipment | |
JPS56140452A (en) | Memory protection system | |
JPS5582359A (en) | Microprogram test unit | |
JPS5533232A (en) | Sequential controller | |
JPS57121746A (en) | Information processing device | |
JPS5566042A (en) | Memory control circuit | |
JPS55123739A (en) | Memory content prefetch control system | |
JPS5657111A (en) | Sequence controller | |
JPS55122216A (en) | Magnetic card read/write control unit | |
JPS55108030A (en) | Data transfer control system | |
JPS5699550A (en) | Information processing unit | |
JPS55135960A (en) | Micro-computer | |
KR940001160A (en) | Signal processing structure to preselect memory address data | |
JPS54107235A (en) | Interrupt control system | |
JPS553038A (en) | Microprogram control unit | |
JPS57193847A (en) | Memory bank dividing circuit | |
JPS55134461A (en) | Memory unit control system | |
JPS5622157A (en) | Process system multiplexing system | |
JPS57176464A (en) | Data transfer system | |
JPS5745659A (en) | Memory address managing device | |
JPS55134443A (en) | Data processing unit | |
JPS5532183A (en) | Information process apparatus | |
JPS5470735A (en) | Electronic computer | |
JPS5697164A (en) | Test and set and test and reset system | |
JPS5654678A (en) | Memory control system |