JPS5539935A - Paper tape reading device - Google Patents

Paper tape reading device

Info

Publication number
JPS5539935A
JPS5539935A JP11171278A JP11171278A JPS5539935A JP S5539935 A JPS5539935 A JP S5539935A JP 11171278 A JP11171278 A JP 11171278A JP 11171278 A JP11171278 A JP 11171278A JP S5539935 A JPS5539935 A JP S5539935A
Authority
JP
Japan
Prior art keywords
reset
paper tape
error
resetting
false
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11171278A
Other languages
Japanese (ja)
Inventor
Tsutomu Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11171278A priority Critical patent/JPS5539935A/en
Publication of JPS5539935A publication Critical patent/JPS5539935A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To prevent the failure to read the data owing to the error operation by resetting the paper tape due to the abnormal reading, turning the table setting switch OFF and resetting the error condition register through the each of the logic circuit.
CONSTITUTION: The error condition register 1 has an input terminal to which the signals ERR1.P, ERR2-P representing the abnormality generating are connected. Once the inputs of them are true, the corresponding output terminals are made respectively true and these outputs are held until the inputs of the reset terminal R are false. In the case of resetting the paper tape due to the abnormality of the reading, the tape setting switch 4 is once turned OFF, output of the reversing gate 5 becomes false, the reset control circuit 2 is reset, and thereafter, the output of the reversing gate becomes true, NAND gate 7 is made false, and the register 1 is reset. In this manner, the failure to read the data owing to the operation in error can be prevented by bringing the error again unless the paper tape is reset.
COPYRIGHT: (C)1980,JPO&Japio
JP11171278A 1978-09-13 1978-09-13 Paper tape reading device Pending JPS5539935A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11171278A JPS5539935A (en) 1978-09-13 1978-09-13 Paper tape reading device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11171278A JPS5539935A (en) 1978-09-13 1978-09-13 Paper tape reading device

Publications (1)

Publication Number Publication Date
JPS5539935A true JPS5539935A (en) 1980-03-21

Family

ID=14568240

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11171278A Pending JPS5539935A (en) 1978-09-13 1978-09-13 Paper tape reading device

Country Status (1)

Country Link
JP (1) JPS5539935A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5881616U (en) * 1981-11-28 1983-06-02 日本コロムビア株式会社 Output voltage adjustment circuit
JPS62279407A (en) * 1986-05-28 1987-12-04 Amada Metrecs Co Ltd Nc device for machine tool
JPH02100414A (en) * 1988-10-06 1990-04-12 Nec Corp Intermediate level detecting circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5881616U (en) * 1981-11-28 1983-06-02 日本コロムビア株式会社 Output voltage adjustment circuit
JPS62279407A (en) * 1986-05-28 1987-12-04 Amada Metrecs Co Ltd Nc device for machine tool
JPH02100414A (en) * 1988-10-06 1990-04-12 Nec Corp Intermediate level detecting circuit

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