JPS5515522A - Digital arithmetic circuit - Google Patents

Digital arithmetic circuit

Info

Publication number
JPS5515522A
JPS5515522A JP8737578A JP8737578A JPS5515522A JP S5515522 A JPS5515522 A JP S5515522A JP 8737578 A JP8737578 A JP 8737578A JP 8737578 A JP8737578 A JP 8737578A JP S5515522 A JPS5515522 A JP S5515522A
Authority
JP
Japan
Prior art keywords
code
output
logarithm
input
polarity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8737578A
Other languages
Japanese (ja)
Other versions
JPS5634893B2 (en
Inventor
Akira Fukui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8737578A priority Critical patent/JPS5515522A/en
Publication of JPS5515522A publication Critical patent/JPS5515522A/en
Publication of JPS5634893B2 publication Critical patent/JPS5634893B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/02Digital function generators
    • G06F1/03Digital function generators working, at least partly, by table look-up
    • G06F1/0307Logarithmic or exponential functions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/523Multiplying only
    • G06F7/5235Multiplying only using indirect methods, e.g. quarter square method, via logarithmic domain

Landscapes

  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)

Abstract

PURPOSE: To realize multiplication without using a multiplier, by using the property of logarithms.
CONSTITUTION: Regarding a small step inside of the polygonal line of a PCM code as the mantissa of a logarithm makes it possible to convert approximately a μ-law PCM code into a logarithm code. Circuit 1 composed of ROM, etc., converts an input digital code from input line 10 into a logarithm code and then outputs logarithm code output 11 and polarity bit output 13 equivalent to the absolute value of the input digital code. Next, adder 2 adds output 11 to logarithm input 12 of the absolute value of the coefficient and output logarithm 16 of the absolute value of a value expressed. Circuit 3 composed of an OR-ELSE unit, on the other hand, adds output 13 to polarity bit input 14 of the coefficient to make a decision on the polarity of the output. In circuit 4 consisting of ROM, etc., a desired linear code or non-linear code such as a PCM code is converted from the logarithm code of output 16 and the polarity of output 15, so that digital code output 17 will be outputted.
COPYRIGHT: (C)1980,JPO&Japio
JP8737578A 1978-07-17 1978-07-17 Digital arithmetic circuit Granted JPS5515522A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8737578A JPS5515522A (en) 1978-07-17 1978-07-17 Digital arithmetic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8737578A JPS5515522A (en) 1978-07-17 1978-07-17 Digital arithmetic circuit

Publications (2)

Publication Number Publication Date
JPS5515522A true JPS5515522A (en) 1980-02-02
JPS5634893B2 JPS5634893B2 (en) 1981-08-13

Family

ID=13913140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8737578A Granted JPS5515522A (en) 1978-07-17 1978-07-17 Digital arithmetic circuit

Country Status (1)

Country Link
JP (1) JPS5515522A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58128759U (en) * 1982-02-23 1983-08-31 三菱重工業株式会社 fever patch
JP2005296540A (en) * 2004-04-16 2005-10-27 Akira Tomono Air gun type particulate ejector

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5469039A (en) * 1977-11-14 1979-06-02 Hitachi Denshi Ltd Multiplier/divider

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5469039A (en) * 1977-11-14 1979-06-02 Hitachi Denshi Ltd Multiplier/divider

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58128759U (en) * 1982-02-23 1983-08-31 三菱重工業株式会社 fever patch
JP2005296540A (en) * 2004-04-16 2005-10-27 Akira Tomono Air gun type particulate ejector

Also Published As

Publication number Publication date
JPS5634893B2 (en) 1981-08-13

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