JPS55154730A - Method of diffusing b into si wafer - Google Patents

Method of diffusing b into si wafer

Info

Publication number
JPS55154730A
JPS55154730A JP6304279A JP6304279A JPS55154730A JP S55154730 A JPS55154730 A JP S55154730A JP 6304279 A JP6304279 A JP 6304279A JP 6304279 A JP6304279 A JP 6304279A JP S55154730 A JPS55154730 A JP S55154730A
Authority
JP
Japan
Prior art keywords
film
substrate
gas
treated
sin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6304279A
Other languages
Japanese (ja)
Inventor
Katsufusa Shono
Hideaki Goshima
Toru Shinmen
Hirokazu Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujikura Ltd
Original Assignee
Fujikura Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujikura Ltd filed Critical Fujikura Ltd
Priority to JP6304279A priority Critical patent/JPS55154730A/en
Publication of JPS55154730A publication Critical patent/JPS55154730A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To diffuse B to an optional medium or low concentration, by laminating a thin SiN film, a BN film and a thin SiN film by the CVD method over an Si substrate having an SiO2 film provided with an opening, and by effecting heat treatment. CONSTITUTION:An opening is made through an SiO2 film 2 on an Si substrate 1. The substrate is put in a reaction tube. The substrate and the film are treated with SiH4-NH3-N2 gas at about 850 deg.C to produce a thin SiN film 51. Subsequently, the gas is replaced with B2H6-NH3-N2 gas and the substrate and the film are treated at about 350 deg.C to make a BN film 4. The gas is replaced with SiH4-NH3-N2 gas again and the substrate and the films are treated at about 850 deg.C to laminate an SiN film 5. They are then treated with N2 gas at 1,200 deg.C to produce a B-diffused layer 6. According to this method, the SiN film grows with the lapse of treatment time to hinder B from being supplied from the BN film. Therefore, the B-diffused layer can be set at a desired surface concentration by controlling the thickness of the thin SiN film 51.
JP6304279A 1979-05-22 1979-05-22 Method of diffusing b into si wafer Pending JPS55154730A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6304279A JPS55154730A (en) 1979-05-22 1979-05-22 Method of diffusing b into si wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6304279A JPS55154730A (en) 1979-05-22 1979-05-22 Method of diffusing b into si wafer

Publications (1)

Publication Number Publication Date
JPS55154730A true JPS55154730A (en) 1980-12-02

Family

ID=13217871

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6304279A Pending JPS55154730A (en) 1979-05-22 1979-05-22 Method of diffusing b into si wafer

Country Status (1)

Country Link
JP (1) JPS55154730A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61188963A (en) * 1985-02-18 1986-08-22 Matsushita Electric Ind Co Ltd Semiconductor device
US5485034A (en) * 1992-04-28 1996-01-16 Kabushiki Kaisha Toshiba Semiconductor device including bipolar transistor having shallowed base

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61188963A (en) * 1985-02-18 1986-08-22 Matsushita Electric Ind Co Ltd Semiconductor device
US5485034A (en) * 1992-04-28 1996-01-16 Kabushiki Kaisha Toshiba Semiconductor device including bipolar transistor having shallowed base

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