JPS55151881A - Dpcm coding circuit - Google Patents

Dpcm coding circuit

Info

Publication number
JPS55151881A
JPS55151881A JP5965879A JP5965879A JPS55151881A JP S55151881 A JPS55151881 A JP S55151881A JP 5965879 A JP5965879 A JP 5965879A JP 5965879 A JP5965879 A JP 5965879A JP S55151881 A JPS55151881 A JP S55151881A
Authority
JP
Japan
Prior art keywords
output
adder
predictor
circuit
quantizer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5965879A
Other languages
Japanese (ja)
Other versions
JPS5932951B2 (en
Inventor
Yoshihiro Murakami
Shohei Hatake
Kunio Matsumoto
Junichi Ishida
Daiji Nishizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Japan Broadcasting Corp
Original Assignee
Nippon Hoso Kyokai NHK
Oki Electric Industry Co Ltd
Japan Broadcasting Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Hoso Kyokai NHK, Oki Electric Industry Co Ltd, Japan Broadcasting Corp filed Critical Nippon Hoso Kyokai NHK
Priority to JP54059658A priority Critical patent/JPS5932951B2/en
Publication of JPS55151881A publication Critical patent/JPS55151881A/en
Publication of JPS5932951B2 publication Critical patent/JPS5932951B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N11/00—Colour television systems
    • H04N11/04—Colour television systems using pulse code modulation
    • H04N11/042—Codec means
    • H04N11/046—DPCM

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Color Television Systems (AREA)

Abstract

PURPOSE:To secure the steady circuit operation although the sampling frequency may be three times as much as the chrominance carrier, by decreasing the number of the circuit elements of the loop circuit relating the predictor functioning as a pre- predictor. CONSTITUTION:The video signal received at input terminal 11 is turned into the digital output of A/D converter 1 via the sampling signal sent from terminal 13 to reach quantizer 3. The desired PCM output is obtained through output terminal 12 by making the output of quantizer 3 pass through bit converter 4. At the same time, the output of quantizer 3 is applied to adder 6. The output of adder 6 is applied to 2-dimensional predictor 10, and the output of predictor 10 is applied to adder 16 via delay circuit 9. On the other hand, the output of predictor 15 is applied also to adder 16, and the output of adder 16 is applied to adder 7. Pre-predictor 8 is included in the loop circuit in which substractor 2, equalizer 3, predictor 8, adder 7 and latch circuit 5 are connected in the sequential and circulating way. Accordingly, the time required for operation of the loop circuit can be shortened by decreasing the number of the circuit elements, thus securing the steady operation of the circuit even with the high sampling frequency.
JP54059658A 1979-05-17 1979-05-17 DPCM encoding circuit Expired JPS5932951B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54059658A JPS5932951B2 (en) 1979-05-17 1979-05-17 DPCM encoding circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54059658A JPS5932951B2 (en) 1979-05-17 1979-05-17 DPCM encoding circuit

Publications (2)

Publication Number Publication Date
JPS55151881A true JPS55151881A (en) 1980-11-26
JPS5932951B2 JPS5932951B2 (en) 1984-08-11

Family

ID=13119512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54059658A Expired JPS5932951B2 (en) 1979-05-17 1979-05-17 DPCM encoding circuit

Country Status (1)

Country Link
JP (1) JPS5932951B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100459460C (en) * 2001-11-27 2009-02-04 三星电子株式会社 Data encoding and decoding method and device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100459460C (en) * 2001-11-27 2009-02-04 三星电子株式会社 Data encoding and decoding method and device

Also Published As

Publication number Publication date
JPS5932951B2 (en) 1984-08-11

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