JPS55143037A - Treating method of semiconductor complex - Google Patents

Treating method of semiconductor complex

Info

Publication number
JPS55143037A
JPS55143037A JP5033979A JP5033979A JPS55143037A JP S55143037 A JPS55143037 A JP S55143037A JP 5033979 A JP5033979 A JP 5033979A JP 5033979 A JP5033979 A JP 5033979A JP S55143037 A JPS55143037 A JP S55143037A
Authority
JP
Japan
Prior art keywords
acid
etching liquid
semiconductor
nitric acid
concentrated sulfuric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5033979A
Other languages
Japanese (ja)
Inventor
Susumu Koyama
Yoshiaki Okajima
Masao Tsuruoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5033979A priority Critical patent/JPS55143037A/en
Publication of JPS55143037A publication Critical patent/JPS55143037A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching

Abstract

PURPOSE:To suppress the dissolution of a metal electrode when an Si semiconductor having the electrode is treated with an etching liquid comprising a hydrofluoric acid and nitric acid, by composing the etching liquid by four element, i.e. hydrofluoric acid, nitric acid, concentrated sulfuric acid and boric acid. CONSTITUTION:A semiconductor complex, in which a metal electrode is attached to an Si semiconductor, is treated with an Si etching liquid comprising hydrofluoric acid and nitric acid and is thereafter washed in water. The etching liquid is composed of hydrofluoric acid, nitric acid, concentrated sulfuric acid and boric acid. The quantity of the hydrofluoric acid is 44-48% by volume. The quantity of the nitric acid is 30-32% by volume. The quantity of the concentrated sulfuric acid is 20-26% by weight. The quantity of the boric acid is 110-180g/l. As a result, only Si is dissolved at a room temperature of 15-20 deg.C within a short time of 8- 10 seconds and the metal gets its surface made glossy but is not eroded.
JP5033979A 1979-04-25 1979-04-25 Treating method of semiconductor complex Pending JPS55143037A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5033979A JPS55143037A (en) 1979-04-25 1979-04-25 Treating method of semiconductor complex

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5033979A JPS55143037A (en) 1979-04-25 1979-04-25 Treating method of semiconductor complex

Publications (1)

Publication Number Publication Date
JPS55143037A true JPS55143037A (en) 1980-11-08

Family

ID=12856155

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5033979A Pending JPS55143037A (en) 1979-04-25 1979-04-25 Treating method of semiconductor complex

Country Status (1)

Country Link
JP (1) JPS55143037A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4897369A (en) * 1987-06-29 1990-01-30 SGS-Thompson Microelectronics S.p.A. Method for shaping the edges of slices of semiconductor material

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4897369A (en) * 1987-06-29 1990-01-30 SGS-Thompson Microelectronics S.p.A. Method for shaping the edges of slices of semiconductor material

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