JPS55130148A - Forming method of bump electrode - Google Patents

Forming method of bump electrode

Info

Publication number
JPS55130148A
JPS55130148A JP3687179A JP3687179A JPS55130148A JP S55130148 A JPS55130148 A JP S55130148A JP 3687179 A JP3687179 A JP 3687179A JP 3687179 A JP3687179 A JP 3687179A JP S55130148 A JPS55130148 A JP S55130148A
Authority
JP
Japan
Prior art keywords
bump
layer
plated
film
primary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3687179A
Other languages
Japanese (ja)
Inventor
Keiji Miyamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3687179A priority Critical patent/JPS55130148A/en
Publication of JPS55130148A publication Critical patent/JPS55130148A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01024—Chromium [Cr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To enhance the integrity of bump electrodes by forming a plated primary film on a wiring layer, forming a chrome (Cr) plated layer for connecting predetermined bump forming position on a substrate to an electrode of the wiring layer on the primary film, and connecting the plated layer through the primary film to a plated layer to form a solder bump. CONSTITUTION:A contact hole is perforated at a protective film 3 on a wiring layer 2. A plated primary layer consisting of a Ti film 4 and a Cu film 5 is then formed on the entire surface of a substrate. There is then formed a Cu plated layer 6 so formed in pattern as to connect a predetermined bump forming position onto an electrode of the layer 2. Thereafter, a solder bump 7 connected to a Cr plated layer is formed at the bump forming position using a mask. At this time the bump is formed through a bump primary film 8 on a plated primary layer. Thereafter, with the layer 6 and the bump 7 as a mask the films 5, 6 are etched and removed. Thus, the bump may be provided on any position. Since the layer 6 is not moistened with solder, the bump may not be expanded owing to its moistened state.
JP3687179A 1979-03-30 1979-03-30 Forming method of bump electrode Pending JPS55130148A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3687179A JPS55130148A (en) 1979-03-30 1979-03-30 Forming method of bump electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3687179A JPS55130148A (en) 1979-03-30 1979-03-30 Forming method of bump electrode

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP60134042A Division JPS6116552A (en) 1985-06-21 1985-06-21 Integrated circuit device

Publications (1)

Publication Number Publication Date
JPS55130148A true JPS55130148A (en) 1980-10-08

Family

ID=12481838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3687179A Pending JPS55130148A (en) 1979-03-30 1979-03-30 Forming method of bump electrode

Country Status (1)

Country Link
JP (1) JPS55130148A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6034043A (en) * 1983-08-05 1985-02-21 Sharp Corp Bump structure at semiconductor chip

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940383A (en) * 1972-08-24 1974-04-15
JPS5040511A (en) * 1973-07-31 1975-04-14

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940383A (en) * 1972-08-24 1974-04-15
JPS5040511A (en) * 1973-07-31 1975-04-14

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6034043A (en) * 1983-08-05 1985-02-21 Sharp Corp Bump structure at semiconductor chip

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