JPS551179A - Complementary mis integrated circuit apparatus - Google Patents

Complementary mis integrated circuit apparatus

Info

Publication number
JPS551179A
JPS551179A JP4535579A JP4535579A JPS551179A JP S551179 A JPS551179 A JP S551179A JP 4535579 A JP4535579 A JP 4535579A JP 4535579 A JP4535579 A JP 4535579A JP S551179 A JPS551179 A JP S551179A
Authority
JP
Japan
Prior art keywords
type
region
substrate
integrated circuit
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4535579A
Other languages
Japanese (ja)
Other versions
JPS5950226B2 (en
Inventor
Kazuo Yudasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP54045355A priority Critical patent/JPS5950226B2/en
Publication of JPS551179A publication Critical patent/JPS551179A/en
Publication of JPS5950226B2 publication Critical patent/JPS5950226B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0927—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising a P-well only in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To compose a thin film resistor suitable for the integrated circuit apparatus by forming a polycrystal layer through an insulating film on a well region simultaneously with the formation of the region on the mainsurface of the semiconductor substrate on which one conducting MOSFET is made. CONSTITUTION:A P-type source region 10 and a P-type drain region 11 are formed on the main surface of a n Si substrate while a gate electrode made of a P-type polycrystal layer 8b is formed between the regions 10 and 11 on the substrate 1 through a gate oxide film 7b to make a p MOSFET. On the other hand, a p-type well region 6, a n-type source region and a n-type drain region 16 are formed on the main surface of the substrate 1 while a gate electrode made of a n-type polycrystal layer 8a is formed between the regions 14 and 15 on the surface of the region to make a n-type MOSFET. In addition, a p-type well region 23 is formed on the main surface of the substrate 1 and polycrystal layers 8c1 to 8c2 are formed on the region 23 through a thermal oxide film 7c and the layer 8c2 is composed as a resistor.
JP54045355A 1979-04-16 1979-04-16 Complementary MIS integrated circuit device Expired JPS5950226B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54045355A JPS5950226B2 (en) 1979-04-16 1979-04-16 Complementary MIS integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54045355A JPS5950226B2 (en) 1979-04-16 1979-04-16 Complementary MIS integrated circuit device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP11582373A Division JPS5321992B2 (en) 1973-10-17 1973-10-17

Publications (2)

Publication Number Publication Date
JPS551179A true JPS551179A (en) 1980-01-07
JPS5950226B2 JPS5950226B2 (en) 1984-12-07

Family

ID=12716966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54045355A Expired JPS5950226B2 (en) 1979-04-16 1979-04-16 Complementary MIS integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5950226B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5878740A (en) * 1981-11-02 1983-05-12 Sumitomo Rubber Ind Ltd Method and apparatus for manufacturing tire

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH051228Y2 (en) * 1985-06-13 1993-01-13

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5878740A (en) * 1981-11-02 1983-05-12 Sumitomo Rubber Ind Ltd Method and apparatus for manufacturing tire
JPS6258905B2 (en) * 1981-11-02 1987-12-08 Sumitomo Rubber Ind

Also Published As

Publication number Publication date
JPS5950226B2 (en) 1984-12-07

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