JPS5470780A - Semicoductor capacity device - Google Patents

Semicoductor capacity device

Info

Publication number
JPS5470780A
JPS5470780A JP13806177A JP13806177A JPS5470780A JP S5470780 A JPS5470780 A JP S5470780A JP 13806177 A JP13806177 A JP 13806177A JP 13806177 A JP13806177 A JP 13806177A JP S5470780 A JPS5470780 A JP S5470780A
Authority
JP
Japan
Prior art keywords
capacity
region
terminal
type
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13806177A
Other languages
Japanese (ja)
Inventor
Yoshio Nakao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP13806177A priority Critical patent/JPS5470780A/en
Publication of JPS5470780A publication Critical patent/JPS5470780A/en
Pending legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE: To obtain a capacity device which is capable of the capacity value switching in steps by forming both the PN junction capacity and the MOS capacity within one element and then combining these capacities.
CONSTITUTION: P-type region 2 is formed through diffusion within N-type Si substrate 1; N-type region 3 is provided within region 2; and Althin film 5 is coated via insulator layer 4 on the surface of region 3. Then electrode 6, 7 and 8 are attached on region 1, 2 and 3 each, with terminal 9 provided to film 5. Thus, the PN junction is caused between region 1 and 2 as well as between region 2 and 3, and at the same time the MOS capacity is caused between region 3 and 5. As a result, an electric series connection is cecured for the capacity 10 (between terminal 6 and 7), capacity 11 (between terminal 7 and 8) and capacity 12 (between terminal 8 and 9) respectively. Thus, the desired capacity value can be obtained through a proper connection between these terminals.
COPYRIGHT: (C)1979,JPO&Japio
JP13806177A 1977-11-16 1977-11-16 Semicoductor capacity device Pending JPS5470780A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13806177A JPS5470780A (en) 1977-11-16 1977-11-16 Semicoductor capacity device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13806177A JPS5470780A (en) 1977-11-16 1977-11-16 Semicoductor capacity device

Publications (1)

Publication Number Publication Date
JPS5470780A true JPS5470780A (en) 1979-06-06

Family

ID=15213055

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13806177A Pending JPS5470780A (en) 1977-11-16 1977-11-16 Semicoductor capacity device

Country Status (1)

Country Link
JP (1) JPS5470780A (en)

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